Theoretical Studies on the Physical Properties of Poly-Si and Metal Gates/HfO2 Related High-k Dielectrics Interfaces

Shiraishi, Kenji; Torii, Kazuyoshi; Akasaka, Y.; Nakayama, Takashi; Nakaoka, T.; Miyazaki, Seiichi; Chikyow, Toyohiro; Yamada, Keiichi; Nara, Yasuo

doi:10.1149/1.2209298

Cited by 3 publications

(3 citation statements)

References 23 publications

(55 reference statements)

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“…4, and such reaction layers have not been observed in n+poly-Si gate MISFETs. These results completely corroborate the finding of our investigations (10)(11)(12)(13).…”

Section: Effective Work Functions After High-temperature Treatmentsupporting

confidence: 93%

“…Thus, dopants such as B are not the main cause of FLP. We have proposed that interface reaction between poly-Si and HfO 2 that causes oxygen vacancy (Vo) generation and subsequent electron transfer from HfO 2 into poly-Si gates, is the physical origin of FLP observed in poly-Si/HfO 2 gate stacks (10)(11)(12)(13). In Fig.…”

Section: Effective Work Functions After High-temperature Treatmentmentioning

confidence: 99%

“…These phenomena cannot be explained by the existing models such as Hf-Si bond model (6) nor the conventional charge neutrality level concept (7)(8)(9). On the other hand, it is doubtless that oxygen vacancies (Vo) exert crucial effects on the EWFs of gate materials; they cause Fermi level pinning (FLP) in poly-Si gates (10)(11)(12)(13) and an O 2 pressure induced instability of p-metal EWFs (14). In this paper, we discuss physical origin of the much different behaviors of EWFs observed in p-metals after high-and low-temperature treatments.…”

Section: Introductionmentioning

confidence: 99%

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Theoretical Studies on Metal/High-k Gate Stacks

et al. 2007

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We consider the cause of different behavior of effective work function of gate metals after high and low temperature treatments. After high temperature treatment, reaction between Hf-based high-k dielectrics and a Si substrate generates oxygen vacancies (Vo) in high-k dielectrics, which leads to the subsequent electron transfer from Vo to gate metals. As a result, effective work function of gate metals becomes small and Fermi level pinning of gate metals occurs. Thus, Fermi level pinning is unavoidable phenomena for gate-first- processes. On the other hand, intrinsic hybridization between metal and high-k wave function at the interface is crucial factor to determine effective work function of gate metals after low temperature treatment. Accordingly, interface structures and band structures of metals govern the intrinsic effective work functions of metals.

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“…4, and such reaction layers have not been observed in n+poly-Si gate MISFETs. These results completely corroborate the finding of our investigations (10)(11)(12)(13).…”

Section: Effective Work Functions After High-temperature Treatmentsupporting

confidence: 93%

Section: Effective Work Functions After High-temperature Treatmentmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Theoretical Studies on Metal/High-k Gate Stacks

et al. 2007

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Theoretical investigations on metal/high-k interfaces

Shiraishi

Nakayama

Miyazaki

et al. 2008

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

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We have found that effective work functions of high-work function gate metals (p-metals) become small and Fermi level pinning of gate metals occurs after high temperature treatment as the same in the case in p+poly-Si gates. On the contrary, intrinsic hybridization between metal and high-k wave function at the interface is crucial factor to determine effective work function of gate metals after low temperature treatment. As discussed above, metal/high-k interface properties are much different each other after high-and lowtemperature treatment.

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