An economical realisation of speech coding calls for a fixed point digital signal processor (DSP) instead of a floating point one. The best way to compare the suitability of DSPs for waveform coding of speech is to implement a representative piece of a speech coding program with each processor. The programmable fixed point single chip processors chosen for comparison are the three highly popular DSPs used today: the TMS320C25 of Texas Instruments, the DSP56001 of Motorola and the DSP16 of AT&T. Although the architectures of these processors are already several years old, they still represent the state of the art of fixed point DSPs. The performance of each DSP is evaluated in the implementation of the adaptive predictor of the lower sub-band for the SB-ADPCM codec. The results are presented both as number of instruction cycles and as execution times including the effect of instruction cycle length. The results seem to favour DSPs with short instruction cycles against DSPs wit!! large complicated instruction sets. The conditional instructions that can replace conditional jumps are found to be essential for the speed of execution.