The X-Hall Sensor: Toward Integrated Broadband Current Sensing

Abstract

This paper presents the X-Hall sensor, a viable sensing architecture for implementing a silicon-integrated, broadband, current/magnetic sensor. The X-Hall sensor overcomes the bandwidth limit of the state-of-the-art Hall sensors by replacing the spinning-current technique with DC-biasedbased, passive offset compensation. In this way, the X-Hall architecture removes the methodological bandwidth limit due to the spinning-current technique and allows for exploiting the Hall probe up to its practical limit, which is set by the parasitic capacitive effects. Moreover, the X-Hall architecture allows to push the practical bandwidth limit at higher frequencies due to both the removal of the switches inherent in the spinning-current approach and a specifically designed analog front-end. To this end, a differential-difference current-feedback amplifier (DDCFA) is proposed as analog front-end in the X-Hall sensor. A prototype of the proposed X-Hall architecture is implemented in BCD 0.16-µm silicon technology to experimentally assess the performance of the X-Hall architecture. The passive offset compensation implemented into the X-Hall architecture is frequency independent and preserves an adequate offset reduction performance, though less efficient than the spinning-current technique operated at low frequency. Experimental dynamic tests on the prototype identify the presence of an additive parasitic dynamic perturbation due to the package that prevents from fully exploiting the X-Hall prototype up to its designed bandwidth limit. However, the implementation of a post de-emphasis digital filter allows to mitigate for the dynamic perturbation and to experimentally achieve a sensor bandwidth of 4 MHz, which is the broadest bandwidth ever demonstrated by a purely Hall-effect based sensor.

Hall-Effect Current Sensors: Principles of Operation and Implementation Techniques

“…Despite a number of limitations including low sensitivity, limited BW, high intrinsic offset, sensitivity to external magnetic fields, and temperature dispersion of the parameters, their compact nature, low cost, low heat dissipation, high DR, good linearity, and the ability to measure DC currents, make HECS well suited for modern power applications. Moreover, the typical limitations of HECS can be mitigated by exploiting specific materials, devices, and tailored circuit configurations [31]- [33].…”

“…These last two techniques also allow to protect the device from spurious electric fields by connecting the covering layer to ground. In all cases, a parasitic capacitance is associated to the depletion region, setting a fundamental BW limit for the HECS [31], [52], [53].…”

“…Moreover, specific lead and bonding techniques with low resistivity values must be implemented. At the same time, the package, leads, and bonding wires can critically reduce the operating BW, as they create spurious parasitic elements, which might couple the magnetic field generated by the sensed current into sensitive signal nodes [31] (see Sec. IV).…”

“…In addition, the SC itself limits the BW to less than 1 4Tspin . Broader BWs can be achieved by replacing SC with passive offset compensation techniques and improving the DDA with current-feedback solutions [31], [67].…”

“…It clearly demonstrates that the effectiveness of the SC technique decreases at high spinning-current frequencies, meaning that there exists a maximum operating BW limit set by the SC. Additional sources of DC offset uncertainty are the dependency on temperature as well as other long-term drifts [31].…”