The VPC Trace-Compression Algorithms

Burtscher, Martin; Ganusov, Ilya; Jackson, S.J.; Ke, Jianhong; Ratanaworabhan, Paruj; Sam, Nana B.

doi:10.1109/tc.2005.186

Cited by 51 publications

(31 citation statements)

References 39 publications

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“…The original symbol is replaced with the number of tries that were necessary to guess the symbol correctly. The VPC family of compressors is based on a similar idea [4]. These compressors work on traces of records whose fields are memory addresses or data values.…”

Section: Related Workmentioning

confidence: 99%

Online compression of cache-filtered address traces

Michaud

2009

2009 IEEE International Symposium on Performance Analysis of Systems and Software

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Section: Related Workmentioning

confidence: 99%

Online compression of cache-filtered address traces

Michaud

2009

2009 IEEE International Symposium on Performance Analysis of Systems and Software

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“…A number of trace-specific compression techniques have been proposed [8][9][10]. However, they are mainly focused on software-based compression, combining trace-specific compression with a general-purpose compression algorithm, such as gzip or bzip2.…”

Section: Introductionmentioning

confidence: 99%

Hardware-based data value and address trace filtering techniques

Uzelac¹,

Milenković

2010

Proceedings of the 2010 International Conference on Compilers, Architectures and Synthesis for Embedded Systems

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Capturing program and data traces during program execution unobtrusively in real-time is crucial in debugging and testing of cyber-physical systems. However, tracing a complete program unobtrusively is often cost-prohibitive, requiring large on-chip trace buffers and wide trace ports. Whereas program execution traces can be efficiently compressed in hardware, compression of data address and data value traces is much more challenging due to limited redundancy. In this paper we describe two hardwarebased filtering techniques for data traces: cache first-access tracking for load data values and data address filtering using partial register-file replay. The results of our experimental analysis indicate that the proposed filtering techniques can significantly reduce the size of the data traces (~5-20 times for the load data value trace, depending on the data cache size; and ~5 times for the data address trace) at the cost of rather small hardware structures in the trace module.

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“…Note this implementation differs from other proposed value predictor-based compression (VPC) techniques, which feed several predictors in parallel and emit a code indicating which predictor is correct [4,26]. We have found that, for our datasets of branch traces, indicating in the output stream which one of a set of predictors has succeeded results in a stream of indicator codes which is itself difficult to compress.…”

Section: Structurementioning

confidence: 84%

“…The dictionary and codewords are then passed to gzip for impressive compression ratios. This n-tuple scheme led to a more generic stream based compression scheme by the same authors [18] which has recently been surpassed by VPC [4]. Since BPC outperforms VPC for branch traces, we believe it would outperform the stream based compression as well, though different trace formats make a direct comparison difficult.…”

Section: Related Workmentioning

confidence: 99%

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Branch trace compression for snapshot-based simulation

Barr

Asanović

2006 IEEE International Symposium on Performance Analysis of Systems and Software

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We present a scheme to compress branch trace information for use in snapshot-based microarchitecture simulation. The compressed trace can be used to warm any arbitrary branch predictor's state before detailed microarchitecture simulation of the snapshot. We show that compressed branch traces require less space than snapshots of concrete predictor state. Our branch-predictor based compression (BPC) technique uses a software branch predictor to provide an accurate model of the input branch trace, requiring only mispredictions to be stored in the compressed trace file. The decompressor constructs a matching software branch predictor to help reconstruct the original branch trace from the record of mispredictions. Evaluations using traces from the Journal of ILP branch predictor competition show we achieve compression rates of 0.013-0.72 bits/branch (depending on workload), which is up to 210× better than gzip; up to 52× better than the best general-purpose compression techniques; and up to 4.4× better than recently published, more general trace compression techniques. Moreover, BPC-compressed traces can be decompressed in less time than corresponding traces compressed with other methods.

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The VPC Trace-Compression Algorithms

Cited by 51 publications

References 39 publications

Online compression of cache-filtered address traces

Online compression of cache-filtered address traces

Hardware-based data value and address trace filtering techniques

Branch trace compression for snapshot-based simulation

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