The Thin-Film Module as a High-Performance Semiconductor Package

A discussion on transistors and electronic computing including some history introduces semiconductor devices and the motivation for miniaturization of transistors. The changing physics of field-effect transistors and ways to mitigate the deterioration in performance caused by the changes follows. The limits of transistors are tied to the requirements of the chips that carry them and the difficulties of fabricating very small structures. Some concluding remarks about transistors and limits are presented.

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“…The propagation of signals on resistive transmission lines is governed by the equations (Carslaw and Jaeger 1947, Magnusson 1965, Ho 1982)…”

Section: Propagation Of Pulses On Wiresmentioning

confidence: 99%

Physical limits of silicon transistors and circuits

2005

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“…When the propagation delay of an on-chip metal line becomes larger than half of the transition time, then the conductor should be treated as a transmission line [7]. As indicated in [1], very resistive transmission lines exhibit delays that are much larger than one would expect for a lossless line in a given dielectric medium. This is what we refer to as the on-chip effect.…”

Section: A Description Of the Effectmentioning

confidence: 99%

“…This is what we refer to as the on-chip effect. An approximate equation for the line delay ( in ps) with repeater circuits is given by [8] 3 (1) where is the driver and repeater output resistance in ohms; are the linear line resistance and capacitance in pf/mm and /mm, respectively; is the total line length in mm; is the number of line segments; and is the repeater delay in ps. (Repeaters are re-powering circuits and their operation will be explained subsequently.)…”

Section: A Description Of the Effectmentioning

confidence: 99%

“…Many personal computer (PC) owners know that the speed of an Intel microprocessor ( P) has increased by about a factor of 20 throughout this period. 1 While improving performance, Intel also increased the chip size and placed more and more function onto each generation of P chip. This example is typical of what the entire P industry has been able to accomplish and the computer consumer expects that this trend will continue into the foreseeable future.…”

Section: Introductionmentioning

confidence: 99%

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Long lossy lines (L/sup 3/) and their impact upon large chip performance

Davidson

McCredie²,

Vilkelis

1997

IEEE Trans. Comp., Packag., Manufact. Technol. B

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The semiconductor industry expects the performance of microprocessors to continue at its current rate of improvement; i.e., clock rates should double every two to three years. This is a commendable goal but it is also fair to question whether this is an achievable goal. The fundamental problem is that as groundrules are reduced, the natural tendency is to make smaller conductor cross-sectional areas. The result is a high resistance line that exhibits slow wave propagation effects [1]. This reduces the general performance expectations. As circuits become faster and denser on the chip, line delays become greater than expected. This problem will be analyzed and potential chip and packaging solutions will be offered. Clock rate predictions for various design and process options will be made. A tactical recommendation to consider a total packaged electronics solution is presented.Index Terms-High clock rate, high performance, large chip, large die, long line, lossy line, MCM, microprocessor, multichip module, submicron design.

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“…[1][2][3][4][5][6][7] As a result of these properties, polyimides have been utilized in metallic conductor substrates, TAB (Tape Automated Bonding), FPCB (Flexible Printed Circuit) and COF (Chips on Flexible Printed Circuit). There has been an increase in the use of FPCB in thin film processes due to the decreasing dimensions of electronic parts and devices.…”

Section: Introductionmentioning

confidence: 99%

Effect of RF sputtering power on the adhesion of Ni thin film to polyimide

Woo

Park

Jung

et al. 2011

Electron. Mater. Lett.

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This study represents the results of an investigation of the peel strength and surface morphology according to the Ni sputtering power in producing Cu/Ni/PI structured flexible copper clad laminate (FCCL) using polyimide (PI). In order to analyze the surface morphologies of the sputtered Ni, Cu, and electrodeposited copper foil, and their crystal structure and interface binding structure, field emission scanning electron microscopy (FESEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) were used. The surface roughness of the deposited layers and the crystal structure of the electrodeposited Cu layers varied according to the Ni sputtering power. In the range of RF output of 100~400 W in the Ni deposition process, the metal layers deposited at a power of about 300 W showed a homogeneous surface morphology and also exhibited a high peel strength for polyimide. The peeling that occurred at the interface of NiPI in the specimen fabricated using an Ni sputtering power of 300 W was due to the fact that the peeling usually occurs inside the polyimide. In the results of the XPS analysis on the separated Ni surface, the peaks of C and N, which are the major elements in polyimide, showed higher levels compared to those observed under the other conditions.

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The Thin-Film Module as a High-Performance Semiconductor Package

Cited by 157 publications

References 5 publications

Physical limits of silicon transistors and circuits

Physical limits of silicon transistors and circuits

Long lossy lines (L/sup 3/) and their impact upon large chip performance

Effect of RF sputtering power on the adhesion of Ni thin film to polyimide

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