The physical design of on-chip interconnections

Wiśniewski, Michał; Yashchin, Emmanuel; Franch, R.; Conrady, D.P.; Maynard, D.N.; Fiorenza, G.; Noyan, I. C.

doi:10.1109/tcad.2002.807881

Cited by 6 publications

(2 citation statements)

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“…We now discuss the wire-length requirements for one design, i9, in the IFU. The area occupancy [100] of the design is 74%, which is near the median occupancy of all of the IFU designs; here the term area occupancy refers to the ratio of the area occupied by the used gates to the total area allocated to the design in the silicon die, as described in [100]. Figure 6 shows a histogram of the area occupancy of all 18 IFU designs.…”

Section: Figurementioning

confidence: 95%

“…Based on the previous section, the personal knowledge of one of us (R. A. Rand) of the 1401 and 1410 computers, and our experience with the design and analysis of ULSI circuitry for high-performance microprocessors [10,99,100], we have derived an historically equivalent interpretation of Rent's memoranda that is suitable for today's computer components. In this paper, the phrase historically equivalent refers to our mapping of each component described by Rent in the phrases for circuit count and edge connector count, as provided in the previous section, to a functionally equivalent component that exists in today's circuitry [13].…”

Section: An Interpretation For Ulsi Circuitrymentioning

confidence: 99%

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Microminiature packaging and integrated circuitry: The work of E. F. Rent, with an application to on-chip interconnection requirements

2005

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Research on Rent's rule in electrical engineering, the applied sciences, and technology has been based on the publication of a 1971 interpretation of Rent's memoranda by B. S. Landman and R. L. Russo. Because of the wide impact of Rent's work and requests from researchers, we present his original memoranda in this paper. We review the impact of Rent's work and present the memoranda in the context of IBM computer hardware development since the 1950s. Furthermore, because computer hardware components have changed significantly since the memoranda were written in 1960, a new interpretation is needed for today's ultra-large-scale integrated circuitry. On the basis of our analysis of the memoranda, one of the authors' personal knowledge of the 1401 and 1410 computers, and our experience in the design of high-performance circuitry for microprocessor chips, we have derived an historically equivalent interpretation of Rent's memoranda that is suitable for today's computer components. We describe an application of our historically equivalent interpretation to the problem of assessing on-chip interconnection requirements of control logic circuitry in the IBM POWER4e microprocessor.

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Section: Figurementioning

confidence: 95%