The Nature of Delay-Insensitive Computing

Abstract

Citation for published version (APA): Rem, M. (1990). The nature of delay-insensitive computing. (Computing science notes; Vol. 9020). Eindhoven: Technische Universiteit Eindhoven. Document status and date:Published: 01/01/1990 Document Version:Publisher's PDF, also known as Version of Record (includes final page, issue and volume numbers) Please check the document version of this publication:• A submitted manuscript is the version of the article upon submission and before peer-review. There can be important differences between the submitted version and the official published version of record. People interested in the research are advised to contact the author for the final version of the publication, or visit the DOI to the publisher's website.• The final author version and the galley proof are versions of the publication after peer review.• The final published version features the final layout of the paper including the volume, issue and page numbers. Link to publication General rightsCopyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights.• Users may download and print one copy of any publication from the public portal for the purpose of private study or research.• You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal.If the publication is distributed under the terms of Article 25fa of the Dutch Copyright Act, indicated by the "Taverne" license above, please follow below link for the End User Agreement: www.tue.nl/taverne Take down policyIf you believe that this document breaches copyright please contact us at:openaccess@tue.nl providing details and we will investigate your claim. Delay-insensitive systems are systems whose correct functioning does not depend on delay assumptions. In this paper a gradual introduction to delayinsensitivity is given, illustrated by many examples. Precise definitions are given of delay-insensitivity, decomposition (or refinement), and speed-independence. Recent results of the associated theory are touched upon.

Investigation into micropipeline latch design styles

“…Other asynchronous design styles such as dual-rail encoding, where each boolean is implemented on two wires to allow the timing information to be communicated for each data bit, are considered to be delay-insensitive [12]; that is they are insensitive to variations in the delays of logic gates and wiring. Once the data bundling constraints are met the micropipeline approach can be considered delay-insensitive.…”