The mirrored lateral SCR (MILSCR) as an ESD protection structure: design and optimization using 2-D device simulation

Delage, C.; Nolhier, Nicolas; Bafleur, Marise; Dorkel, Jean-Marie; Hamid, H. A.; Givelin, P.; Lin-Kwang, J.

doi:10.1109/4.782089

Cited by 7 publications

(3 citation statements)

References 5 publications

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“…Failure analysis carried out using the focus ion beam (FIB) technique confirmed that failure actually occurs deep below the emitter, at a location where the 2-D simulation showed both high current density and high electric field [13].…”

Section: Analysis Of Physical Mechanisms Involved Under An Esd Smentioning

confidence: 98%

Analysis and compact modeling of a vertical grounded-base n-p-n bipolar transistor used as ESD protection in a smart power technology

Bertrand

Delage²,

Bafleur

et al. 2001

IEEE J. Solid-State Circuits

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A thorough analysis of the physical mechanisms involved in a vertical grounded-base n-p-n bipolar transistor (VGBNPN) under electrostatic discharge (ESD) stress is first carried out by using two-dimensional (2-D) device simulation, transmission line pulse measurement (TLP) and photoemission experiments. This analysis is used to account for the unexpected low value of the VGBNPN snapback holding voltage under TLP stress. A compact model based on a new avalanche formulation resulting from the exact resolution of the ionization integral is therefore proposed.

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Section: Analysis Of Physical Mechanisms Involved Under An Esd Smentioning

confidence: 98%

Analysis and compact modeling of a vertical grounded-base n-p-n bipolar transistor used as ESD protection in a smart power technology

Bertrand

Delage²,

Bafleur

et al. 2001

IEEE J. Solid-State Circuits

Self Cite

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“…The MILSCR, which is designed with dual-direction active SCR current paths, comprises two vertical NPN transistors, one vertical PNP transistor, and one lateral PNP transistor in N-epi P-substrate high-voltage CMOS process. The MILSCR was designed for high-voltage applications [49], but its switching voltage can be also adjusted to meet the requirements of the low-voltage CMOS ICs as those of the MLSCR or the LVTSCR. Although the SCR-based devices can elevate the ESD levels of high-voltage CMOS IC products, how to avoid the transient-induced latchup issue [31] of SCR-based devices under normal circuit operating conditions in high-voltage process is another important reliability consideration [50].…”

Section: Scr Devices In Other Applicationsmentioning

confidence: 99%

“…The DENMOS merged with an SCR [46], [47], or the embedded SCR LDMOS (ESCR-LDMOS) [48], had been reported to improve ESD level of high-voltage IC products. Another ESD protection device for high-voltage applications is the mirrored lateral SCR (MILSCR) [49]. The MILSCR, which is designed with dual-direction active SCR current paths, comprises two vertical NPN transistors, one vertical PNP transistor, and one lateral PNP transistor in N-epi P-substrate high-voltage CMOS process.…”

Section: Scr Devices In Other Applicationsmentioning

confidence: 99%

Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits

Ker

Hsu

2005

IEEE Trans. Device Mater. Relib.

198

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An overview on the electrostatic discharge (ESD) protection circuits by using the silicon controlled rectifier (SCR)-based devices in CMOS ICs is presented. The history and evolution of SCR device used for on-chip ESD protection is introduced. Moreover, two practical problems (higher switching voltage and transient-induced latchup issue) limiting the use of SCR-based devices in on-chip ESD protection are reported. Some modified device structures and trigger-assist circuit techniques to reduce the switching voltage of SCR-based devices are discussed. The solutions to overcome latchup issue in the SCR-based devices are also discussed to safely apply the SCR-based devices for on-chip ESD protection in CMOS IC products.Index Terms-Electrostatic discharge (ESD), ESD protection circuits, latchup, silicon controlled rectifier (SCR).

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ESD Protection for Smart Power Applications

2008

ESD Protection Device and Circuit Design for Advanced CMOS Technologies

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The mirrored lateral SCR (MILSCR) as an ESD protection structure: design and optimization using 2-D device simulation

Cited by 7 publications

References 5 publications

Analysis and compact modeling of a vertical grounded-base n-p-n bipolar transistor used as ESD protection in a smart power technology

Analysis and compact modeling of a vertical grounded-base n-p-n bipolar transistor used as ESD protection in a smart power technology

Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits

ESD Protection for Smart Power Applications

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