The low-frequency noise behaviour of silicon-on-insulator technologies

Simoen, Eddy; Claeys, Cor

doi:10.1016/0038-1101(95)00427-0

Cited by 60 publications

(32 citation statements)

References 76 publications

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“…Unlike the case of metals, where the specific defects responsible for the noise are not usually easy to identify, a significant body of experimental and theoretical work shows that O vacancies in play a dominant role in determining the noise of MOS transistors [5], [7], [10], [28], [30]- [33], [82], [92], [98]- [111]. For example, a strong correlation has been observed between the noise of transistors before irradiation and threshold-voltage shifts due to net positive radiation-induced oxide-trap charge after irradiation, as shown in Fig.…”

Section: B Defect Microstructures and Energiesmentioning

confidence: 99%

“…The noise of MOS transistors built on silicon-on-insulator (SOI) wafers can be larger than that of otherwise equivalent transistors on bulk wafers, because higher defect densities are often associated with buried channel or sidewall oxides than with gate oxides [159]- [161]. Fig.…”

Section: Silicon-on-insulator and Multi-gate Devicesmentioning

confidence: 99%

“…Floating body effects can increase the noise of partially depleted devices [159]- [161]. For example, Fig.…”

Section: Silicon-on-insulator and Multi-gate Devicesmentioning

confidence: 99%

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<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

Fleetwood

2015

IEEE Trans. Nucl. Sci.

157

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This paper reviews and compares predictions of the Dutta-Horn model of low-frequency excess ( ) noise with experimental results for thin metal films, MOS transistors, and GaN/AlGaN high-electron mobility transistors (HEMTs). For metal films, mobility fluctuations associated with carrier-defect scattering lead to noise. In contrast, for most semiconductor devices, the noise usually results from fluctuations in the number of carriers due to charge exchange between the channel and defects, usually at or near a critical semiconductor/insulator interface. The Dutta-Horn model describes the noise with high precision in most cases. Insight into the physical mechanisms that lead to noise in microelectronic materials and devices has been obtained via total-ionizing-dose irradiation and/or thermal an- nealing, as illustrated with several examples. With the assistance of the Dutta-Horn model, measurements of the noise magnitude and temperature and/or voltage dependence of the noise enable estimates of the energy distributions of defects that lead to noise. The microstructure of several defects and/or impurities that cause noise in MOS devices (primarily O vacancies) and GaN/AlGaN HEMTs (e.g., hydrogenated impurity centers, N vacancies, and/or Fe centers) have been identified via experiments and density functional theory calculations.Index Terms-Border traps, gallium nitride, HEMTs, interface traps, low-frequency noise, MOS devices, noise, oxide traps, radiation response, silicon carbide. 0018-9499

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Section: B Defect Microstructures and Energiesmentioning

confidence: 99%

Section: Silicon-on-insulator and Multi-gate Devicesmentioning

confidence: 99%

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<formula formulatype="inline"><tex Notation="TeX">$1/f$</tex></formula> Noise and Defects in Microelectronic Materials and Devices

Fleetwood

2015

IEEE Trans. Nucl. Sci.

157

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show abstract

“…In this case, two transistors are connected in series, a master (M) and a slave (S), with corresponding gate lengths L M and L S , respectively, while the gates are tied together. It has been shown that this suppresses both the kink in the output characteristics [8] and the corresponding LF noise overshoot [9,10], whereby the best results have been obtained for L M > L S . The physical mechanisms behind it are twofold: one, the master-slave configuration produces a lowering of the maximum field in saturation near the drain of the TG combination, compared with a single transistor with the same length and, hence, reduces the production of impact ionization current.…”

Section: Introductionmentioning

confidence: 86%

“…For example, it has recently been demonstrated that for (ultra-) thin gate oxide partially depleted (PD) SOI MOSFETs a so-called linear kink effect (LKE) can be induced by majority carriers injected in the body by electron valence-band (EVB) tunnelling [2,3]. Besides kink effects in the current-voltage (I-V) characteristics, it has also been demonstrated that the low-frequency (LF) noise of SOI transistors exhibits a strong increase in the impact-ionization [1,4] and the ''linear'' kink regimes [5][6][7], which is obviously detrimental for analog applications.…”

Section: Introductionmentioning

confidence: 99%