The JUNCAP2 Model for Junction Diodes

Scholten, A.J.; Smit, G.D.J.; Langevelde, R. van; Klaassen, D.B.M.

doi:10.1007/978-90-481-8614-3_10

Cited by 6 publications

(2 citation statements)

References 10 publications

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“…where W 0 represents the principal branch of the Lambert function [4]. This regional approach in principle would allow the extraction of I 0k , n k , and R S by fitting eqn.…”

Section: Quadratic Exponential Modelmentioning

confidence: 99%

Parameter Extraction in Quadratic Exponential Junction Model with Series Resistance using Global Lateral Fitting

Lugo-Muñoz

Souza

Pavanello³

et al. 2010

ECS Trans.

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A global lateral fitting procedure is proposed to extract the parameters of quadratic double exponential junction models in the presence of parasitic series resistance. Error analysis of the extracted parameters values within a large representative family of synthetic data indicate excellent match between the extracted values and a wide range of the original given model parameters. The procedure was also tested on real data to extract the model parameters of an experimental Silicon PIN diode measured at cryogenic temperature.

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“…where W 0 represents the principal branch of the Lambert function [4]. This regional approach in principle would allow the extraction of I 0k , n k , and R S by fitting eqn.…”

Section: Quadratic Exponential Modelmentioning

confidence: 99%

Parameter Extraction in Quadratic Exponential Junction Model with Series Resistance using Global Lateral Fitting

Lugo-Muñoz

Souza

Pavanello³

et al. 2010

ECS Trans.

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show abstract

“…Recently, we developed an accurate surface-potential based compact LDMOS transistor model PSPHV [1] to help design and optimize such ICs. PSPHV consists of an enhanced version of the PSP103.6 MOS transistor model [2] for the intrinsic channel, a modified version of the JFETIDG dual-gate JFET model [3] for the drift region, and JUNCAP2 [4], extended to improve modeling at high forward bias, for parasitic junction diodes. These components are integrated into a single Verilog-A code which is publicly available [5].…”

Section: Introductionmentioning

confidence: 99%

Parameter Extraction for the PSPHV LDMOS Transistor Model

Xia

McAndrew

Langevelde

2020

IEEE J. Electron Devices Soc.

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This paper details a robust parameter extraction flow for the PSPHV LDMOS transistor model. The procedure uses a global scaling parameter set and accounts for self-heating. We describe how to determine parameters associated with important physical effects specific to PSPHV: non-uniform lateral channel doping; the Kirk effect; internal drain voltage clamping; and the drain expansion effect. The method is verified on devices from different technologies. Verilog-A code for PSPHV is publicly available.

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Photosensitivity Performance of a Gate-Oxide-Stack Intended Source FDSOI-Based 1T Pixel Sensor

Rao,

Mishra

2023

IEEE Sensors J.

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The JUNCAP2 Model for Junction Diodes

Cited by 6 publications

References 10 publications

Parameter Extraction in Quadratic Exponential Junction Model with Series Resistance using Global Lateral Fitting

Parameter Extraction in Quadratic Exponential Junction Model with Series Resistance using Global Lateral Fitting

Parameter Extraction for the PSPHV LDMOS Transistor Model

Photosensitivity Performance of a Gate-Oxide-Stack Intended Source FDSOI-Based 1T Pixel Sensor

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