The influence of stacking faults on leakage currents of FET devices

Schwuttke, G. H.; Brack, K.; Hearn, E. W.

doi:10.1016/0026-2714(71)90105-3

Cited by 21 publications

(8 citation statements)

References 5 publications

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“…Manuscript submitted Aug. 7,1972; revised manuscript received Nov. 9, 1972. This was Paper 62 presented at the Houston, Texas, Meeting of the Society, May 7-11, 1972. Any discussion of this paper will appear in a Discussion Section to be published in the December 1973 JOURNAL.…”

Section: Discussionmentioning

confidence: 99%

“…The electrical effects associated with these defects however have not been unambiguously demonstrated. Apart from statistical correlation between the presence of certain defects and the attendant electrical aberrations (6)(7)(8) most of the discussion in the literature is speculative and ambiguous. The difficulty is usually of an experimental nature in that the interaction between a particular defect in the semiconductor and the depletion field of the p-n junction cannot be observed directly by any of the conventional techniques.…”

mentioning

confidence: 99%

“…The difficulty is usually of an experimental nature in that the interaction between a particular defect in the semiconductor and the depletion field of the p-n junction cannot be observed directly by any of the conventional techniques. Furthermore there has been a tendency to rely on low resolution techniques such as x-ray topography (6,7) and surface decoration methods (8) to detect the presence of defects that might be influencing the junction characteristics. These techniques can at best provide a rough correlation between the presence or absence of a defect and the electrical characteristics of the p-n junction.…”

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confidence: 99%

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Electrically Active Stacking Faults in Silicon

Ravi

Varker

Volk

1973

J. Electrochem. Soc.

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The influence of oxidation induced stacking faults on the electrical characteristics of p‐n junctions in silicon has been studied by employing scanning and transmission electron microscopy in conjunction with electrical measurements. Diodes were fabricated with a junction depth Xj=4µnormalm and an integrated boron concentration of ∼3×1016 cm−2 normalin 1–3 ohm‐cm n‐type epitaxial silicon.The presence of decorated stacking faults in the field region of the diodes examined is found to introduce excess reverse leakage currents in the junction. However not all faults introduce the same degree of leakage and the electrical activity of the faults is found to vary. The concept of the “threshold voltage” of a stacking fault is introduced which is a measure of the specific electrical activity of the fault. Electrically active faults introduce excess reverse currents in the diodes which are characterized by a relationship between the reverse log I/V ratio measured at low voltages and the characteristic “threshold voltage” of the faults. The electrical activity is related to both the size and the structure of the faults. The smaller faults which are also more prone to impurity decoration are electrically more active than larger faults which are decorated to a lesser degree. Models are presented to account for the electrical activity of the faults. These models are based on the strain effects of the decorated faults and on the distortions produced in the p‐n junctions by the presence of faults.

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Section: Discussionmentioning

confidence: 99%

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Electrically Active Stacking Faults in Silicon

Ravi

Varker

Volk

1973

J. Electrochem. Soc.

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“…Because the majority of work has focused on the light emission process, e.g. (2,3), the mechanism and cause of the localized nature of the pore formation process, as well as the factors affecting it, are still poorly understood (4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17). This is even more true for other semiconductor materials such as III-V compounds.…”

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confidence: 99%

Formation of porous layers on InSb(100) by anodization

Schmuki¹,

Santinacci

Lockwood

et al. 2003

phys. stat. sol. (a)

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The present work deals with anodization processes of n-type InSb(100). Preferential etching of InSb can be electrochemically initiated in HCl, HBr and HF solutions. Except for etch features also the formation of porous layers can be observed. The resulting features were characterized by SEM and AES measurements. Due to the narrow bandgap of the material the results of the anodization process are neither sensitive to illumination of the n-type material nor to the doping level. The morphology of the attack depends strongly on the electrochemical conditions and the type of halogen acid present in the electrolyte. In HCl and HBr a black porous layer can be formed that is likely to consist to a certain extent of an antimonyoxo-chloride or antimony-oxo-bromide.In HF, however, polarization under a wide range of electrochemical conditions leads to a uniform etching of the InSb surface.

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“…(2,3). Hence, the pore formation process and pore growth are less well understood (4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17). This is even more true for other semiconductor materials such as III-V compounds.…”

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confidence: 99%

Selective porosification of n-InP(100) after focused ion beam implantation of Si

Schlierf¹,

Champion

Sproule

et al. 2003

phys. stat. sol. (a)

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Selective pore formation can be electrochemically initiated on n-type InP(100) on presensitized surfaces. To create this presensitization, defect patterns were written into the surface by focused ion beam (FIB) implantation of Si ++ . These implant sites represent initiation sites for pore growth or for selective material dissolution in the patterns, if anodic polarization is carried out positive to the pore formation potential (PFP) of the defective surface but cathodic to the PFP of the intact surface. A variety of internal and external factors were found to influence the selectivity of the process. Parameters that significantly affect the morphology are polarization voltage, implantation dosage, the time and the anion present in the electrolyte. In the present work it is shown, that pore formation in 1 M HF only occurs for a small potential range and a certain dosage range of the implanted Si ++ ions. At other potentials or dosages, a homogenous dissolution of the implanted patterns takes place. Apart from direct selective porosification of InP surfaces, the process described can be used for a selective surface patterning.

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The influence of stacking faults on leakage currents of FET devices

Cited by 21 publications

References 5 publications

Electrically Active Stacking Faults in Silicon

Electrically Active Stacking Faults in Silicon

Formation of porous layers on InSb(100) by anodization

Selective porosification of n-InP(100) after focused ion beam implantation of Si

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