The Influence of Minority Carrier Density on Degradation and Regeneration Kinetics in Multicrystalline Silicon Wafers

Wyller, Guro Marie; Wiig, Marie Syre; Due-Sorensen, Ida; Søndenå, Rune

doi:10.1109/jphotov.2021.3078367

Cited by 5 publications

(3 citation statements)

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“…A number of results have been reported on accelerated LETID tests on modules and several commercial testing labs have created internal accelerated testing protocols. But comparison of these results is difficult: among other variables, the precise temperature and injection level in the device may actually impact the extent of LETID, as the degradation transition from state A → B and the regeneration transition B → C both happen simultaneously [38, 39]. This motivates a standard with defined temperature and injection conditions over a defined time.…”

Section: Letid An Overviewmentioning

confidence: 99%

“…In particular, the TS protocol reduces the test from 4 weeks of injection at 75°C to 2 weeks, and accelerates the initial stages of LETID by doubling the prescribed dark current injection to 2 × (I SC − I MP ). LETID has been shown to increase linearly with excess carrier concentration (Δn), so doubling the current would be expected to double the initial degradation rate (R deg, t = 0 ) [39, 55]. After t = 0, in the case of 2 × (I SC − I MP ), the minority carrier lifetime and Δn degrade more quickly, therefore reducing R deg more quickly.…”

Section: Comparing This Work With the Ultimate Iec Ts 63342 Protocolmentioning

confidence: 99%

“…B and the regeneration transition B ! C both happen simultaneously [38,39]. This motivates a standard with defined temperature and injection conditions over a defined time.…”

Section: Letid An Overviewmentioning

confidence: 99%

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Results from an international interlaboratory study on light‐ and elevated temperature‐induced degradation in solar modules

Karas

Repins

Berger

et al. 2022

Progress in Photovoltaics

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This paper reports the results of an international interlaboratory comparison study on light‐ and elevated temperature‐induced degradation (LETID) on crystalline silicon photovoltaic (PV) modules. A large global network of PV module manufacturers and PV testing laboratories collaborated to design a protocol for LETID detection and screen a large and diverse set of prototype modules for LETID. Results across labs indicate the reproducibility of LETID testing is likely within ±1% of maximum power (PMP). In intentionally engineered LETID‐sensitive modules, mean degradation after the prescribed detection stress is roughly 6% PMP. In other module types the LETID sensitivity is smaller, and in some we observe essentially negligible degradation attributable to LETID. In LETID‐sensitive modules, both open‐circuit voltage (VOC) and short‐circuit current (ISC) degrade by a roughly similar magnitude. We observe, as do previous studies, that LETID affects each cell in a module differently. An investigation of the potential mismatch losses caused by nonuniform LETID degradation found that mismatch loss is insignificant compared to the estimated loss of cell ISC, which drives loss of module ISC. Overall, this work has helped inform the creation of a forthcoming standard technical specification for LETID testing of PV modules, IEC TS 63342 ED1, and should aid in the interpretation of results from that and other LETID tests.

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Section: Letid An Overviewmentioning

confidence: 99%

Section: Comparing This Work With the Ultimate Iec Ts 63342 Protocolmentioning

confidence: 99%