ICASSP '80. IEEE International Conference on Acoustics, Speech, and Signal Processing
DOI: 10.1109/icassp.1980.1171058
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The implementation of an all digital speech synthesizer using a multimicroprocessor architecture

Abstract: This paper presents a unique approach for the implementation of the speech synthesis portion of a LPC vocoder. The implementation uses eight LSI-ll microprocessors operating synchronously around a time division multiplexed multiport memory.

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Cited by 4 publications
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“…In addition, for a large class of recursive signal flow graphs, the implementations are absolute-optimum in the sense that there is no other implementation for a particular signal flow graph and a particular constituent processor which ever leads to greater systems throughput. The techniques discussed here have been tested on a synchronous multiprocessor system [1] [2] [3].…”
mentioning
confidence: 99%
“…In addition, for a large class of recursive signal flow graphs, the implementations are absolute-optimum in the sense that there is no other implementation for a particular signal flow graph and a particular constituent processor which ever leads to greater systems throughput. The techniques discussed here have been tested on a synchronous multiprocessor system [1] [2] [3].…”
mentioning
confidence: 99%