1992
DOI: 10.1149/1.2069005
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The Impact of Si / SiO2 Interface Asperities on Breakdown Characteristics of Thin Gate Oxides

Abstract: The effect of Si/SiO2 interface roughness on SiO2 breakdown characteristics is investigated by means of numerical calculations. It is shown that similar roughness values of the Si/SiO2 interface may yield different breakdown distributions. It is aL~.o shown that severe field enhancement effects may occur at the Si/SiO2 interface for some specific Si/SiO2 interface asperities. A possible correlation between Si/SiO2 interface roughness, oxygen precipitates, and breakdown characteristics is addressed.) unless CC … Show more

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Cited by 7 publications
(2 citation statements)
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“…The breakdown path is local. This local nature of the breakdown causes the breakdown event to be heavily influenced by asperities at the cathode and leads to a polarity dependence of breakdown distributions [255][256][257][258][259][260][261][262][263]. The importance of the cathode in initiating breakdown has been confirmed by studies showing that the charge-to-breakdown, during constant-current stressing, depends on the cathode material not the anode material [264][265][266].…”
Section: Oxide Breakdownmentioning
confidence: 99%
“…The breakdown path is local. This local nature of the breakdown causes the breakdown event to be heavily influenced by asperities at the cathode and leads to a polarity dependence of breakdown distributions [255][256][257][258][259][260][261][262][263]. The importance of the cathode in initiating breakdown has been confirmed by studies showing that the charge-to-breakdown, during constant-current stressing, depends on the cathode material not the anode material [264][265][266].…”
Section: Oxide Breakdownmentioning
confidence: 99%
“…One of the major device performance parameter, gate oxide breakdown voltage, has been subject of many investigations [4][5][6][7]. The gate breakdown has been attributed to many factors including defects on the silicon substrates-surface crystal-originated particle (COP), thermal oxide oxidation process conditions, pin holes in thermally grown oxide, mobile ions contamination, Si/SiO 2 interface roughness [8][9][10][11][12]. The higher annealing temperature also causes gate breakdown, and has been attributed to the oxide quality degradation, and postulated to be due to breaking or straining of the S-O bonds at higher temperatures [13].…”
Section: Introductionmentioning
confidence: 99%