The impact of device width on the variability of post-irradiation leakage currents in 90 and 65 nm CMOS technologies

Rezzak, Nadia; Maillard, Pierre; Schrimpf, R.D.; Alles, Michael L.; Fleetwood, D.M.; Li, Yanfeng Albert

doi:10.1016/j.microrel.2012.05.013

Cited by 15 publications

(4 citation statements)

References 24 publications

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“…The narrow device exhibits a higher pre-irradiation threshold voltage, 28.9 V, than the wide one, 25.4 V, which is essentially consistent with the results in bulk technology. [10,11] There, the off-state leakage currents of the narrow devices are lower than those of the wide ones. Mechanical stress is supposed to play an important role in determining this inverse narrow channel effect.…”

mentioning

confidence: 99%

The Enhanced Role of Shallow-Trench Isolation in Ionizing Radiation Damage of Narrow Width Devices in 0.2 μm Partially-Depleted Silicon-on-Insulator Technology

Huang¹,

Bi²,

Peng³

et al. 2013

Chinese Phys. Lett.

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An anomalous total dose effect is observed in narrow-width devices fabricated in a 0.2 𝜇m partially-depleted silicon-on-insulator (SOI) technology. The previous radiation-induced narrow channel effect manifests itself with obvious threshold voltage shift after the transistors are subjected to total dose radiation in bulk technology. Nevertheless, a sharply increasing off-state leakage current dominates the total dose effects in narrow devices of this partially-depleted SOI technology instead of threshold voltage shifts. A radiation-induced positive charge trapping model is introduced to understand this phenomenon. The enhanced role of shallow-trench oxide induced by compressive mechanical stress in narrow devices is discussed in detail in terms of modification of the edge impurity density and charge trapping characteristics, which affect the total dose sensitivity.

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mentioning

confidence: 99%

The Enhanced Role of Shallow-Trench Isolation in Ionizing Radiation Damage of Narrow Width Devices in 0.2 μm Partially-Depleted Silicon-on-Insulator Technology

Huang¹,

Bi²,

Peng³

et al. 2013

Chinese Phys. Lett.

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“…Larger variation means the difference in characteristics between devices is more evident and the performance of the system employing them may be affected by this 'uncertainty' if it is not under control. Issues on radiation induced parameter variation are also reported in other studies, such as total ionizing radiation induced a larger variation of leakage current [13] and some other related reports on the variation of single-event upset [14].…”

Section: Comparison Between Bulk Si Cms and Pdsoi Cmsmentioning

confidence: 70%

Impact of heavy ion irradiation on CMOS current mirrors based on SOI and bulk Si substrates: mismatch and output impedance

Tan

et al. 2015

Semicond. Sci. Technol.

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The impact of a single event on the performance of CMOS current mirrors (CMs) is studied experimentally in this paper. Both basic and cascode CMs based on bulk Si and PDSOI substrates are employed to demonstrate the permanent effects of damage generated by heavy-ion strikes. The results show that the mismatch of the CMs (bulk Si/PDSOI basic/cascode CMs) changes after heavy-ion irradiation, which means that the accuracy of the output current may need re-evaluation when CMs are operated in a harsh environment. For output impedance, a drastic reduction of 40% is observed for small (W/L=0.5 μm/0.25 μm) PDSOI basic CMs. This may limit the application of CMs when high output impedance is required to provide a large gain or common mode rejection ratio. Different types of performance degradation after heavyion irradiation are classified, and the characteristics are also statistically compared between different types of CM. The mechanisms of these changes are then discussed and traced back to the damage induced by the random heavy-ion strikes. These results demonstrate the permanent effects of damage generated by heavy-ion strikes in CMOS CMs, and provide insights into the impact of heavy-ion irradiation on analog circuits.

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“…The increase in variability in as-processed devices is primarily caused by minor variations in the production process, such as random dopant fluctuations [4], oxide thickness variations [3] and hydrogen concentration variations [5]. In recent studies, it has been shown how the random statistical fluctuations in manufacturing processes impact the radiation response of a given technology [6][7][8][9] increasing costs and complexity of the radiation qualification process [10].…”

Section: Introductionmentioning

confidence: 99%

Fab-to-fab and run-to-run variability in 130 nm and 65 nm CMOS technologies exposed to ultra-high TID

et al. 2023

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The discovery of a large fab-to-fab variability in the TID response of the CMOS technologies used in the design of ASICs for the particle detectors of the HL-LHC triggered a monitoring effort to verify the consistency of the CMOS production process over time. As of 2014, 22 chips from 3 different fabs in 130 nm CMOS technology and 11 chips from 2 different fabs in 65 nm CMOS technology have been irradiated to ultra-high doses, ranging from 100 Mrad(SiO2) to 1 Grad(SiO2). This unprecedented monitoring effort revealed significant fab-to-fab and run-to-run variability, both dependent on the characteristics of the MOS transistors.

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The impact of device width on the variability of post-irradiation leakage currents in 90 and 65 nm CMOS technologies

Cited by 15 publications

References 24 publications

The Enhanced Role of Shallow-Trench Isolation in Ionizing Radiation Damage of Narrow Width Devices in 0.2 μm Partially-Depleted Silicon-on-Insulator Technology

The Enhanced Role of Shallow-Trench Isolation in Ionizing Radiation Damage of Narrow Width Devices in 0.2 μm Partially-Depleted Silicon-on-Insulator Technology

Impact of heavy ion irradiation on CMOS current mirrors based on SOI and bulk Si substrates: mismatch and output impedance

Fab-to-fab and run-to-run variability in 130 nm and 65 nm CMOS technologies exposed to ultra-high TID

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