The G-machine: A fast, graph-reduction evaluator

Abstract

The G-machine is an abstract architecture for evaluating functional-language programs by programmed graph reduction. Unlike combinator reduction, in which control is derived dynamically from the expression graph itself, control in programmed graph reduction is specified by a sequence of instructions derived by compiling an applicative expression.The G-machine architecture was defined by Thomas Johnsson and Lennart Augustsson (Gothenburg) as the evaluation model for a compiler for a dialect of NIL with lazy evaluation rules. This paper describes a sequential evaluator based upon that abstract architecture. It discusses performance issues affecting reduction architectures, then describes the organization of a hardware design to address these issues. The interplay between compilation strategies and the computational engine is exploited in this design.Principal features of the design are (i) hardware support for graph traversal, (ii) a vertically microcoded, pipelined internal architecture, (iii) an instruction fetch and translation unit with very low latency, and (iv) a new memory architecture, one specifically suited to graph reduction and which can be extended to very large memories. Reduction systemsA reduction architecture evaluates an expression by transforming it through a series of intermediate forms until it cannot be further transformed, under a set of rewrite rules. The expression is then said to be in normal form, which is the value attributed to the original expression.To be deemed useful for evaluating functional-language programs, a reduction system must be consistent with the mathematical semantics of applicative expressions. It should also have the Church-Rosser property, which assures the uniqueness of a normal form independent of the particular reduction sequence by which it is produced. These, however, are the only constraints placed upon reduction systems, and a great variety of elegant and imaginative schemes are possible.Church's lambda-calculus and Curry's combinatory calculus are the best known examples of reduction systems, and have served as abstract models for experimental computing engines [Ber75, Cla80, SCN84, Sch85]. There are other systems as well. A string-reduction system implementing the semantics of Backus' metalanguage FFP has been used as the basis for an architecture allowing massive parallelism [Mag79]. String reduction is essentially like combinator reduction except that the value of an expression is not shared among multiple references; the expression is multiply evaluated.Architectures based upon ¢?-reduction (lambda-calculus), combinator reduction, or string reduction all have in common the property that control --the selection of the next reduction step --is dynamically derived from the current expression form at each stage in a reduction sequence. We call systems with this property pure reduction systems.

Needed Computations Shortcutting Needed Steps

“…H + (H fib (H -(n,1)),H fib (H -(n,2))) (20) since every node that is not labeled by the variable or the constants 1 and 2 is needed. In this benchmark, there is also no need to allocate a node for either 1 or 2 every time (20) is constructed/executed. With this further optimization, the step would allocate no new node for the contractum, and the relative gains of our approach would be even more striking.…”

“…Machines for graph reduction have been proposed [10,20] for the implementation of functional languages. While there is a commonality of intent, these efforts differ from ours in two fundamental aspects.…”

Combinator evaluation of functional programs with logical variables

“…In response, a wide range of "super combinator" schemes have been proposed [16,18,22,26]. In response, a wide range of "super combinator" schemes have been proposed [16,18,22,26].…”

A RISC architecture for symbolic computation

“…An initial design of a hardware G-machine [7] executes G-code by expanding it into microcode for an internal execution unit. The execution unit is RISClike, in t h a t most of its instructions execute synchronously, and in a single cycle of the internal clock.…”