2021 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) 2021
DOI: 10.1109/ipfa53173.2021.9617288
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The Failure Mechansim of the E-SOA Boundary of Power Transistor Collapsed at Higher Gate Voltage

Jian–Hsing Lee
1
,
Karuna Nidhi
2
,
Tingyou Lin
3
et al.
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Cited by 6 publications
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References 9 publications
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The Influence of the Block Design on the ID-VD Curves of Power Transistor for E-SOA Characterization

Chen,
Chien,
Wang
et al. 2024
2024 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan)
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The Influence of the Block Design on the ID-VD Curves of Power Transistor for E-SOA Characterization

Chen,
Chien,
Wang
et al. 2024
2024 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan)
0
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Analyze the ESD Discrepancy between Grounded-Gate and Floating-Gate Power Transistors with Gate Electric Field and Magnetic Field Induced by ESD

Lee
1
,
Nidhi
2
,
Lin
3
et al. 2022
2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
3
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RESURF Region Variation Induced Current Crowding Effect on HV p-LDMOS

Lee,
Li,
Nidhi
et al. 2023
2023 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
3
0
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