The Execution Migration Machine: Directoryless Shared-Memory Architecture

Abstract

Distributed directory cache coherence protocols for current many-core CMPs are not only difficult and error-prone to implement and verify, but also provide suboptimal performance when a thread requires access to large amounts of data distributed across the chip: the data must be brought to the core where the thread is running, incurring delays and energy costs. In this paper, we propose an approach based on the combination of partial-context thread migration and a directory-free remote access protocol: for these kinds of applications, our architecture can outperform directory-based cache coherence. In addition, unlike with distributed cache coherence protocols, the verification complexity of our architecture does not grow with the number of cores.

NCDE: In-Network Caching for Directory Entries to Expedite Data Access in Tiled-Chip Multiprocessors

“…The third category maintains cache coherence with the operating system (OS) support. In this context, the use of cache coherence-aware page mapping [19], thread migration [20], and private cache self-invalidation [21], [22] can mitigate the problem of DE eviction-induced invalidation. However, these methods involve the overhead of modification in OS kernel and/or application software.…”