CMOS VLSI devices are becoming higher in speed and density. These advanced CMOS devices have powerful output buffers to charge a load capacitance quickly. which causes large switching noise on the power/ground lines. Furthermore, the equivalent impedance of the output buffer becomes lower than the characteristic impedance of the transmission line on a board, which induces complicated phenomena including ringing noise. This paper mainly describes the electrical characteristics of a 348 pin QFP (Quad flat package) developed for a 1 micron, 129K gate CMOS gate array. First. the factors which determine switching noise were investigated by a simulation model which represents the packaging environment. Next, a test chip for evaluating the swiching noise was designed and used to characterize the developed 348 pin QFP.