2012
DOI: 10.4236/cs.2012.31007
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The Effects of Fabrication Prameters and Electroforming Phenomenon on CdTe/Si (p) Heterojunction Photovoltaic Solar Cell

Abstract: The In-doped CdTe/Si (p) heterostruture was fabricated and its electrical and photoelectrical properties were studied and interpreted. During the fabrication processes of CdTe/Si heterojunction, some practical troubles were encountered. However, the important one was the formation of the SiO<sub>2</sub> thin oxide layer on the soft surface of the Si during the formation of the back contact. The silicon wafer was subjected to different chemical treatments in order to remove the thin oxide layer from… Show more

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Cited by 5 publications
(3 citation statements)
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“…The value of V bi has increased after annealing process. The higher values of V bi may be attributed to the midgap states that act as recombination centers which may arise either from states created as a result of junction fabrication or from lattice mismatch between CdTe and Si [8].…”
Section: The Results and Discussionmentioning
confidence: 99%
“…The value of V bi has increased after annealing process. The higher values of V bi may be attributed to the midgap states that act as recombination centers which may arise either from states created as a result of junction fabrication or from lattice mismatch between CdTe and Si [8].…”
Section: The Results and Discussionmentioning
confidence: 99%
“…In the CdTe/Si heterojunction solar cell, the CdS/CdTe interface and the CdTe absorber layer are the regions where most defects can occur due to the thin film deposition techniques used and the polycrystalline nature of CdTe compared to the highly controlled fabrication methods and crystalline nature of Si solar cells 13 . The common CdTe thin film deposition techniques are close-spaced sublimation (CSS), sputtering, electrodeposition, chemical spray pyrolysis, thermal evaporation, pulsed laser deposition, etc., which are usually not defect-free processes 14 21 . In addition, in the proposed CdTe/Si tandem device, many lattice imperfections in the CdTe layer are likely due to the lattice and thermal mismatches between CdTe or its alloys with Si 7 , 22 .…”
Section: Introductionmentioning
confidence: 99%
“…The lower efficiency is probably due to the loss of carriers due to recombination within CdTe layer (Mohammad et al 2012;Romeo et al 2004;Bonnet et al 2002;Romeo et al 1998). This is possibly due to surface states which are present in the nanostructured CdTe film.…”
Section: Behavior Of N-cdte/p-si Heterojunctionmentioning
confidence: 99%