The Effect of Stress on the Redistribution of Implanted Impurities in GaAs

Abstract

The stress introduced by the difference in thermal expansion coefficients between an encapsulant and a substrate was found to affect the redistribution of implanted impurities during annealing. Compressive stress introduced by an SigN4 film on GaAs enhanced the diffusion of implanted Si, Se, and S. Diffusion constants of Si and Se increased exponentially with the increase in the film thickness in a thickness region less than 0.1 ~m. The diffusion mechanism was discussed and it was concluded that the change in the jump frequency of diffusing atoms was dominant in determining the effect of stress in the damaged implantation layer. Excess of carriers was also observed in Se-and S-implanted samples, while deficit in carriers was observed in Si-implanted samples when the samples were subsequently annealed with an Si3N4 film. ~mall logic swing is essential for achieving a GaAs logic integrated circuit, particularly in ennancementmode logic circuits, where logic swing in Schottky barrier FETes should be 0.7V at most and that in junction FET's 1.2V to avoid appreciable gate current. Channel layers of both FET's are usually formed by ion implantation directly into a semi-insulating ~ubstrate. Variation of the carrier concentration profile in the ion-implanted channel layer over the whole wafer is a most crucial problem for uniformity and reproducibility of the devices. Precisely controlled ion-implanted layers are required to achieve GaAs integrated circuits.ion implantation technology is advantageous, because it can, in principle, control the profile for the channel layer only by changing the implantation energy and ion .dose. The profile is predicted by the LSS range statistics (1). A damaged layer by ion implantation, however, has to be annealed at high temperature in order to remove radiation damage and to activate implanted impurities as donors or acceptors. Implanted impurities are redistributed by diffusion during postimplantation annealing at high temperature. The factors affecting the redistribution were discussed previously by Kasahara and Watanabe (2) and Yoder (3). Thermal stress during post-implantation annealing was pointed out to be one of the factors, and the example was shown in the case of Zn ion implantation into GaAs (2). The effect of the thermal stress on the redistribution of Cr in Cr-doped semi-insulating substrates was also reported (4, 5). However, it is not clear how the stress influenced the redistribution of implanted impurities in GaAs.In this paper, the effect of the external stress on the redistribution of implanted Si, Se, and S in GaAs is investigated by using a wafer with thermal stress introduced by the .difference in the thermal expansion coefficient between an encapsulant and GaAs. Following the descriptions of the experimental conditions and the results, we discuss variations in the diffusion constants of implanted Si and Se under a wide range of external stress conditions. Variations in the doping efficiency of the implanted impurities are also described briefly as a function of the...

Annealing Behavior of GaAs Ion Implanted with p‐Type Dopants

“…Severe film growth suppression and inhomogeneity have been observed for arsine and phosphine at very low concentrations, indicative of a strong interaction of these dopant species with the chemistry of silane pyrolysis (1-4, 6, 7). Similar anomalous results have been found in the production of semi-insulating polysilicon (SIPOS), where oxygen may play a similar role to arsine and phosphine in the in situ doping of polycrystalline silicon (8)(9)(10)(11)(12).…”

“…Previous studies (1)(2)(3)(4)(5)(6)(7)(8)(9)(10)(11) on annealing behavior of gallium arsenide (GaAs) wafers ion implanted with p-type dopants such as Be, Mg, Zn, and Cd have generally shown that the diffusive redistribution of the p-type dopants during annealing is quite complex and that this redistribution depends on a number of parameters. Some of these parameters, such as annealing temperature and time, annealing environment, dopant concentration, ion dose, which controls the lattice damage, and the type of GaAs, are well known and easily characterized, while others, such as the role of the encapsulant in case of capped annealing, dislocation density of GaAs, and the rate of temperature rise during the annealing cycle, are not so obvious.…”

“…The interfacial stress aspect has received some attention in the literature. For example, in case of n-type implants, Si, Se, or S in GaAs, the interfacial stress between the encapsulant silicon nitride and G~aAs was found to enhance the diffusion of the implanted species significantly with the increase in the thickness of the encapsulant film up to 0.1 ~m (10). However, the interfacial stresses can be quite different for different encapsulant materials and even for different deposition techniques for the same encapsulant material.…”

Effect of Melt Stoichiometry on Carrier Concentration Profiles of Silicon Diffusion in Undoped LEC SI ‐ GaAs

“…Many processes for forming n-type layers in GaAs involve the growth of epitaxial layers (1,2), diffusion of Si from solid sources (3,4), and Si ion implantation (6)(7)(8)(9)(10)(11)(12). Heavily doped n-type layers with free carrier concentrations in the range of 5-6.5 • 1018 cm -3 were obtained (3,4) as a result of Si diffusion in GaAs from the surface.…”

“…Diffusion of Si into GaAs from the surface resulting in lightly doped n-type layers has not been reported. Many publications have reported Si ion implantation to form n-type layers in GaAs (6)(7)(8)(9)(10)(11)(12). However, annealing of ion implanted layers is usually performed at temperatures ranging from 800~176 Thus, there is a lack of information about fundamental physical quantities such as an activation energy of Si diffusion in GaAs.…”