The Effect of Pitch Distance on the Statistics and Morphology of Through-Silicon Via Extrusion

Jalilvand, Golareh; Ahmed, Omar; Dube, Nicolas; Jiang, Tengfei

doi:10.1109/tcpmt.2021.3078772

Cited by 7 publications

(3 citation statements)

References 31 publications

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“…Mobility is a function of stress, and even if stress does not have a destructive effect on the structure, it can affect the mobility of the substrate device, which in turn affects the overall performance [20,21,22,23]. Current studies on thermal stresses induced by TSV have focused on the surface of the silicon substrate around the TSV [24,25,26,27]. However, the TSV vertical switching channel direction is along the z-axis, so it is necessary to pay attention to the effect of internal radial thermal stresses from annealing on the TSV vertical switching mobility.…”

Section: Introductionmentioning

confidence: 99%

Effect of annealing residual stress on mobility of TSV vertical switch

Wang,

Ren,

Yin

et al. 2024

IEICE Electron. Express

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The effect of internal radial stress generated during the annealing process on the mobility of through-silicon via (TSV) vertical switch are analyzed in detail, by employing finite element software ANSYS and orthogonal experimental design method. The results show that, the TSV diameter has the largest effect on the mobility of the TSV vertical switch, while the equilateral triangle array produces the smallest effect of stress at the same distance.

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Section: Introductionmentioning

confidence: 99%

Effect of annealing residual stress on mobility of TSV vertical switch

Wang,

Ren,

Yin

et al. 2024

IEICE Electron. Express

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“…Due to the impact of stresses from the adjoining TSVs, the deformation behavior of TSVs is also influenced by the pitch distance. Jalilvand [16] reported that the protrusion morphology is featured by a more annular shape in small-pitch TSVs and more granular shape in large-pitch TSVs. Jalilvand [16] also found that the overall stress in small-pitch TSVs is larger than that in large-pitch counterparts.…”

Section: Introductionmentioning

confidence: 99%

Simulation of TSV Protrusion in 3DIC Integration by Directly Loading on Coarse-Grained Phase-Field Crystal Model

et al. 2022

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As thermal management in 3DIC integration becomes increasingly important in advanced semiconductor node processes, novel experimental and modeling approaches are in great demand to reveal the critical material issues involving multiscale microstructures that govern the behavior of through-silicon-via (TSV) protrusion. Here, a coarse-grained phase-field crystal model properly coupled with mechanics through the atomic density field is used to simulate the formation of polycrystalline structures and protrusion of nano-TSVs from the atomic scale. TSVs with different grain structures are directly loaded, and protrusion/intrusion profiles are obtained along with displacement, stress, and strain fields. Thermodynamic driving forces from external loadings and the mismatch of Young’s modulus between adjoining grains as well as detailed displacement and strain distributions are ascribed to control the complex deformation in TSVs. TSVs with sizes up to around 30 nm and an aspect ratio of 4 are successfully investigated, and a further increase in the size and aspect ratio to cover the micrometer range is feasible, which lays down a solid basis toward a multiscale material database for simulation inputs to the design of TSV-based 3DIC integration and relevant electronic design automation (EDA) tools.

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“…Dependent upon the combined stress and microstructure states in a via, one or more mechanisms may dominate to produce extrusion of varied magnitudes [20], [22]. Statistical variation has also been observed in the morphology of via extrusion, suggesting a correlation between the extrusion mechanism and morphology [23], [24]. Therefore, statistical study of the via extrusion morphology will provide insight on the extrusion mechanism in a large number of Cu TSVs, which is key to the development of practical solutions for the important reliability issue of via extrusion.…”

Section: Introductionmentioning

confidence: 99%

TSV Extrusion Morphology Classification Using Deep Convolutional Neural Networks

Reidy¹,

Jalilvand²,

Jiang³

et al. 2020

Preprint

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In this paper, we utilize deep convolutional neural networks (CNNs) to classify the morphology of through-silicon via (TSV) extrusion in three dimensional (3D) integrated circuits (ICs). TSV extrusion is a crucial reliability concern which can deform and crack interconnect layers in 3D ICs and cause device failures. Herein, the white light interferometry (WLI) technique is used to obtain the surface profile of the extruded TSVs. We have developed a program that uses raw data obtained from WLI to create a TSV extrusion morphology dataset, including TSV images with 54 × 54 pixels that are labeled and categorized into three morphology classes. Four CNN architectures with different network complexities are implemented and trained for TSV extrusion morphology classification application. Data augmentation and dropout approaches are utilized to realize a balance between overfitting and underfitting in the CNN models. Results obtained show that the CNN model with optimized complexity, dropout, and data augmentation can achieve a classification accuracy comparable to that of a human expert.

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The Effect of Pitch Distance on the Statistics and Morphology of Through-Silicon Via Extrusion

Cited by 7 publications

References 31 publications

Effect of annealing residual stress on mobility of TSV vertical switch

Effect of annealing residual stress on mobility of TSV vertical switch

Simulation of TSV Protrusion in 3DIC Integration by Directly Loading on Coarse-Grained Phase-Field Crystal Model

TSV Extrusion Morphology Classification Using Deep Convolutional Neural Networks

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