The effect of metallic impurities on the dielectric breakdown of oxides and some new ways of avoiding them

Verhaverbeke, Steven; Meuris, Marc; Mertens, Paul; Heyns, Marc; Philipossian, Ara; Gräf, D.; Schnegg, A.

doi:10.1109/iedm.1991.235421

Cited by 24 publications

(21 citation statements)

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“…SC-15 is used as an alternative to RCA clean. It is well documented in the literature [5]' [6] that SC-l step (5 :1 :1 ratio of H20, H202, NH40H at 80°C) in RCA cleans causes micro-roughening and even pitting of silicon substrates, thereby introducing trap states (Dit) at the heterointerface [7]. We ensure extremely low anisotropic silicon etch rate to reduce roughening the surface by using high dilution (l :40) of SC-15 formulation.…”

Section: Experimental and F Abrica Tion Processmentioning

confidence: 97%

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates

Saha

Hilali

Onyegam

et al. 2014

2014 IEEE 40th Photovoltaic Specialist Conference (PVSC)

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An improved cleaning process is developed to remove surface contamination before depositing amorphous silicon on a textured surfaces of -25Jlm thick exfoliated and flexible monocrystalline substrates. Auger electron spectroscopy is used to monitor the change in atomic percentage on the surface to reflect the effect on contamination removal due to different cleaning processes. Quantitative analysis of the spectra shows significant reduction (-0.9% atomic) in key contaminant i.e. potassium with the newest cleaning procedure. Electrical data is collected on completed single heterojunction cells on exfoliated substrates to compare between the old process and the new improved process for cleaning the textured surface. An overall enhancement of 22mV and an absolute increase of 1.5% in conversion efficiency are observed with the new and improved cleaning procedure.

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Section: Experimental and F Abrica Tion Processmentioning

confidence: 97%

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates

Saha

Hilali

Onyegam

et al. 2014

2014 IEEE 40th Photovoltaic Specialist Conference (PVSC)

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“…The metal contamination is also a decisive factor on influencing the device yield. Verhaverbeke et al [15] have reported that metal contamination can degrade the oxide breakdown properties by generating silicon surface roughness or by the formation of defect spots during oxidation. As if the concentration of residual metallic contamination on the silicon surface becomes higher, the oxide reliability (charge-to-breakdown) gradually decreases.…”

Section: B the Physical And Chemical Properties Of Poly-si Surface Amentioning

confidence: 99%

Comparison of novel cleaning solutions with various chelating agents for post-CMP cleaning on poly-Si film

Pan

Lei

et al. 2001

IEEE Trans. Semicond. Manufact.

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Abstract-In this study, various cleaning solutions containing chelating agents with carboxyl acid group ( COOH), such as ethylenediaminetetraacetic acid, citric acid and oxalic acid, were developed for post-poly-Si CMP cleaning. The chelating agent and tetramethylammonium hydroxide (TMAH) were simultaneously added into 2% ammonium hydroxide alkaline solution to promote the removal efficiency on particles and metallic impurities. The effectiveness of various cleaning recipes and their interaction mechanism with poly-Si surface were studied. We could explain the surface behavior of various cleaning solutions by the different molecular size and charge of chelating agents. Based on the mechanism, the behavior of surface particle and metallic impurity can be realized. The co-existence of TMAH with citric acid or oxalic acid in the alkaline cleaning solutions can significantly enhance the electrical property for the capacitor.

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“…In addition, the interactions between cleaning and subsequent wafer processing steps should be comprehended. Numerous studies have been conducted to understand and quantify the transfer of contamination characteristics on the wafer surface [2]- [5]. However, no reports were found in the literature based on actual product risk caused by the effects of trace metal contamination in the pre-gate oxide cleans for the sub-100-nm process in high-volume manufacturing fab operations.…”

Section: Introductionmentioning

confidence: 99%

Effect of metal contaminants in pre-gate oxide cleans for sub-100-nm devices

Pathangey

McCarthy

Skilbred

2005

IEEE Trans. Device Mater. Relib.

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Metal contaminants at trace levels in the pre-gate oxide clean solutions have always been a concern with scaling down trends in CMOS-based devices. The effect of multielement contamination (alkali, transition, and noble metals up to 200 ppb levels) in dilute hydrofluoric acid (DHF), standard clean one (SC1), and standard clean two (SC2) solutions is investigated for an Intel Pentium-based sub-100-nm microprocessor technology. The main significance of this work is to achieve a rational specification for process chemical purity. Results from surface analyses of monitor wafers and device level electrical measurements of production scale wafers along with yield and reliability analyses are presented in this paper. Deposition of metallic contaminants from clean solutions has been explained qualitatively based on electrochemical theory of reduction potentials. Among the 35 elements investigated in this study, only platinum at very low parts-per-billion levels in the HF-based cleans has been found to affect the gate oxide integrity producing zero yield. An increase in the surface roughness (2-8×) was also observed with silicon monitor wafers for 100-ppb-platinum-contaminated DHF solutions and could play an important role in degrading the gate oxide performance. Other alkali and transition metals including copper up to 200 ppb levels in the HF-based cleans studied here did not show any deleterious effects in the gate oxide integrity and product reliability measurements. The effect of contamination in the SC1 and SC2 cleans was negligible even for 100 ppb platinum. Significant cost reduction can be realized by safely relaxing the process chemical contamination disposition limits for alkali and transition elements.

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The effect of metallic impurities on the dielectric breakdown of oxides and some new ways of avoiding them

Cited by 24 publications

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Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates

Comparison of novel cleaning solutions with various chelating agents for post-CMP cleaning on poly-Si film

Effect of metal contaminants in pre-gate oxide cleans for sub-100-nm devices

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The effect of metallic impurities on the dielectric breakdown of oxides and some new ways of avoiding them

Cited by 24 publications

References 0 publications

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on &#x223C;25&#x00B5;m thick exfoliated and flexible mono-crystalline silicon substrates

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on &#x223C;25&#x00B5;m thick exfoliated and flexible mono-crystalline silicon substrates

Comparison of novel cleaning solutions with various chelating agents for post-CMP cleaning on poly-Si film

Effect of metal contaminants in pre-gate oxide cleans for sub-100-nm devices

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Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates

Improved cleaning process for post-texture surface contamination removal for single heterojunction solar cells on ∼25µm thick exfoliated and flexible mono-crystalline silicon substrates