2004
DOI: 10.1109/ted.2004.825107
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The Effect of Annealing Temperatures on Self-Aligned Replacement (Damascene) TaCN–TaN-Stacked Gate pMOSFETs

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Cited by 14 publications
(13 citation statements)
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“…In order to keep the advantages of scaling technology, the past decade has seen the tremendous efforts in terms of the developing new process technology, materials and their combinations [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. Since the performance of the future IC technology will be limited by the resistance of the metal interconnects [8], copper metallization is emerging as the alternative to aluminum due to its low electrical resistivity (1.72 mV cm), high melting temperature (1084 8C), high electro-migration resistance and also high stress voiding resistance.…”
Section: Introductionmentioning
confidence: 99%
“…In order to keep the advantages of scaling technology, the past decade has seen the tremendous efforts in terms of the developing new process technology, materials and their combinations [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. Since the performance of the future IC technology will be limited by the resistance of the metal interconnects [8], copper metallization is emerging as the alternative to aluminum due to its low electrical resistivity (1.72 mV cm), high melting temperature (1084 8C), high electro-migration resistance and also high stress voiding resistance.…”
Section: Introductionmentioning
confidence: 99%
“…After the 300 C anneal, the is reduced from 1.6 to 1.1 V. The reduction of with a backend anneal could be the result of releasing the stress between the Re and gate oxide, since no radiation damages are expected for the CVD Re process. For the effects of backend anneals on other gate electrode materials, please see [8]. We have performed Auger analysis before and after the vacuum anneal.…”
Section: Materials and Device Fabricationmentioning
confidence: 99%
“…In order to estimate the work function of CVD Re, we have also fabricated PVD Ta gate transistors, with a replacement and a nonself-aligned method. The fixed charges, caused by the radiation damages, can be reduced by a backend anneal with a thick gate oxide [8]. The assumption of the workfunction measurement is that for both Ta and Re transistors, the effects from the fixed charges are approximately the same.…”
Section: Materials and Device Fabricationmentioning
confidence: 99%
“…The reaction at the metal/dielectric interface (e.g. formation of silicates/silicides) [21,22] or the stability of the film itself (phase separation, crystallization, or nitrogen accumulation/depletion) [23][24][25] may account for changes in the work function. In addition, the polarization layer formed by defects and/or impurities at the interface is an additional contribution to the work function [26].…”
Section: Introductionmentioning
confidence: 99%