The Device for Multiplying Polynomials Modulo an Irreducible Polynomial

Kalimoldayev, Maksat; Tynymbayev, Sakhybay; Sergiy, Gnatyuk; Ibraimov, M.K.; Magzom, Miras; Technologies, Almaty Computational

doi:10.32014/2019.2518-170x.55

Cited by 13 publications

(10 citation statements)

References 11 publications

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“…Unlike codes of RNS, codes of polynomial residue number system have found wide application in cryptography, as shown in [55][56][57][58]. The work [59] presents a technique that allows for switching from the AES encryption algorithm implemented in the finite field GF (2 8 ) to calculations in the ring of finite fields of a smaller order, GF (2 4 ).…”

Section: Introductionmentioning

confidence: 99%

Error-Correction Coding Using Polynomial Residue Number System

et al. 2022

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There has been a tendency to use the theory of finite Galois fields, or GF(2n), in cryptographic ciphers (AES, Kuznyechik) and digital signal processing (DSP) systems. It is advisable to use modular codes of the polynomial residue number system (PRNS). Modular codes of PRNS are arithmetic codes in which addition, subtraction and multiplication operations are performed in parallel on the bases of the code, which are irreducible polynomials. In this case, the operands are small-bit residues. However, the independence of calculations on the bases of the code and the lack of data exchange between the residues can serve as the basis for constructing codes of PRNS capable of detecting and correcting errors that occur during calculations. The article will consider the principles of constructing redundant codes of the polynomial residue number system. The results of the study of codes of PRNS with minimal redundancy are presented. It is shown that these codes are only able to detect an error in the code combination of PRNS. It is proposed to use two control bases, the use of which allows us to correct an error in any residue of the code combination, in order to increase the error-correction abilities of the code of the polynomial residue number system. Therefore, the development of an algorithm for detecting and correcting errors in the code of the polynomial residue number system, which allows for performing this procedure based on modular operations that are effectively implemented in codes of PRNS, is an urgent task.

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Section: Introductionmentioning

confidence: 99%

Error-Correction Coding Using Polynomial Residue Number System

et al. 2022

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“…To improve performance, one-clock multipliers of polynomials modulo with a matrix structure were developed [5][6][7].…”

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confidence: 99%

Pipeline Multiplier of Polynomials Modulo With Analysis of High-Order Bits of the Multiplier

et al. 2020

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Among public-key cryptosystems, cryptosystems built on the basis of a polynomial system of residual classes are special. Because in these systems, arithmetic operations are performed at high speed. There are many algorithms for encrypting and decrypting data presented in the form of polynomials. The paper considers data encryption based on the multiplication of polynomials modulo irreducible polynomials. In such a multiplier, the binary image of a multiply polynomial can serve as a fragment of encrypted text. The binary image of the multiplier polynomial is the secret key and the binary representation of the irreducible polynomial is the module. Existing sequential polynomial multipliers and single-cycle matrix polynomial multipliers modulo do not provide the speed required by the encryption block. The paper considers the possibility of multiplying polynomials modulo on a Pipeline in which architectural techniques are laid in order to increase computing performance. In the conclusion of the work, the time gain of the multiplication modulo is shown by the example of the multiplication of five triples of polynomials. Verilog language was used to describe the scheme of the Pipeline multiplier. Used FPGA Artix-7 from Xilinx companies. The developed Pipeline multiplier can be used for cryptosystems based on a polynomial system of residual classes, which can be implemented in hardware or software.

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“…The main hardware/software and hardware cryptosystems are polynomial multipliers modulo irreducible polynomials, where routine calculations are performed to encrypt and decrypt data. In [6][7][8][9][10][11], multipliers of polynomials modulo irreducible polynomials were considered, where at each step of multiplication, the least significant or most significant bit of the polynomial multiplier was analyzed.…”

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confidence: 99%

The Device for Multiplying Polynomials Modulo With Analysis of Two Least Significant Bits of the Multiplier Per Step

Kalimoldayev¹

2020

SERIES OF GEOLOGY AND TECHNICAL SCIENCES

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The Device for Multiplying Polynomials Modulo an Irreducible Polynomial

Cited by 13 publications

References 11 publications

Error-Correction Coding Using Polynomial Residue Number System

Error-Correction Coding Using Polynomial Residue Number System

Pipeline Multiplier of Polynomials Modulo With Analysis of High-Order Bits of the Multiplier

The Device for Multiplying Polynomials Modulo With Analysis of Two Least Significant Bits of the Multiplier Per Step

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