The Development and Progress of Multi-Physics Simulation Design for TSV-Based 3D Integrated System

Abstract

In order to meet the requirements of high performance, miniaturization, low cost, low power consumption and multi-function, three-dimensional (3D) integrated technology has gradually become a core technology. With the development of 3D integrated technology, it has been used in imaging sensors, optical integrated microsystems, inertial sensor microsystems, radio-frequency microsystems, biological microsystems and logic microsystems, etc. Through silicon via (TSV) is the core technology of a 3D integrated system, which can achieve vertical interconnection between stacked chips. In this paper, the development and progress of multi-physics simulation design for TSV-based 3D integrated systems are reviewed. Firstly, the electrical simulation design of TSV in a 3D integrated system is presented, including the lumped parameters model-based design and numerical computation model-based design. Secondly, the thermal simulation design of TSV in a 3D integrated system is presented based on the analytical model or numerical computation model. Thirdly, the multi-physics co-simulation design of TSV in a 3D integrated system is presented, including the thermal stress and electron thermal coupling simulation design. Finally, this paper is concluded, and the future perspectives of 3D integrated systems are presented, including the advanced integrated microsystems, the crossed and reconfigurable architecture design technology and the standardized and intelligent design technology.

Electro-Thermal and Thermal-Stress Coupling Optimization Design for Coaxial Through Silicon Via

“…The range of h is [40, 100] μm. The range of r1 is [3,6] μm. The ranges of t1, tBCB, t2, tCu, and t3 are [0.1, 0.7],…”

“…Due to the advantages of miniaturization, high performance and high integration, 3-dimensional (3D) integrated microsystem has been widely investigated [1][2][3][4][5][6][7]. Through silicon via (TSV) is the key technology of 3D integrated microsystem [8][9][10][11][12].…”

A Short Review of Through-Silicon via (TSV) Interconnects: Metrology and Analysis

“…Since the year 2000, copper (Cu) plating in deep via holes has emerged as the primary technology for filling high aspect ratio TSVs [6][7][8]. The goal of electroplating is low stress, free of holes and voids during TSV fabrication [9]. TSV technology enables high-density interconnection in the zaxis direction, which significantly reduces the three-dimensional size of the microsystem.…”

“…Joule heating increases temperature, which affects electrical parameters and thermal conductivity. The reliability of TSVs is a multi-physical field coupling problem that requires simultaneous consideration of thermal, electrical, and mechanical reliability [9].…”