The canals language and its compiler

Dahlin, Andreas; Ersfolk, Johan; Yang, Guyfu; Habli, Haitham; Lilius, Johan

doi:10.1145/1543820.1543829

Cited by 7 publications

(2 citation statements)

References 15 publications

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“…Among these, the two most significant ones are probably CAL [5] and Canals [4]. The approach followed in CAPH bears strong similarities with both in them.…”

Section: Related Workmentioning

confidence: 99%

High-Level Dataflow Programming for Reconfigurable Computing

Sérot

Berry

2014

2014 International Symposium on Computer Architecture and High Performance Computing Workshop

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In many application domains, FPGAs are now promoted as a way of getting round the restrictions of specific CPU designs on system scalability. However, in the current state-of-the art, programming FPGAs remains essentially a hardware-oriented activity, relying on dedicated hardware description languages such as VHDL or Verilog. Using these languages requires expertise in digital design and in practice this limits the applicability of FPGA-based solutions. This is particulary true for stream-processing applications, in which some processing must be carried out "on the fly" on digital data streams. In this context, the dataflow programming model offers a very effective way to reduce the gap between high-level formulations and low-level implementations. To support this claim, the authors have recently introduced CAPH, a domain specific language, offering a fully-automated compilation path from high-level dataflow descriptions to FPGA configuration for stream-processing applications. This paper is a introduction to the CAPH language, giving its motivations and main design principles and exposing the basic features of its syntax, semantics and compilation. It also points to experimental results showing that, at least for stream-processing applications, the dataflow model of computation, used jointly as a programming model and an execution model, can offer a very effective way to conciliate abstraction and efficiency when programming FPGAs.

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“…Among these, the two most significant ones are probably CAL [5] and Canals [4]. The approach followed in CAPH bears strong similarities with both in them.…”

Section: Related Workmentioning

confidence: 99%

High-Level Dataflow Programming for Reconfigurable Computing

Sérot

Berry

2014

2014 International Symposium on Computer Architecture and High Performance Computing Workshop

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“…In this section we provide brief background on the Canals language [4]. Canals aims to facilitate code generation for heterogeneous platforms, primarily in the data flow driven application domain.…”

Section: Canalsmentioning

confidence: 99%

Interfacing and scheduling legacy code within the Canals framework

Dahlin

Jokhio

Lilius

et al. 2011

Proceedings of the 2011 Conference on Design &Amp; Architectures for Signal &Amp; Image Processing (DASIP)

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International audienceThe need for understanding how to distribute computations across multiple cores, have obviously increased in the multi-core era. Scheduling the functional blocks of an application for concurrent execution requires not only a good understanding of data dependencies, but also a structured way to describe the intended scheduling. In this paper we describe how the Canals language and its scheduling framework can be used for the purpose of scheduling and executing legacy code. Additionally a set of translation guidelines for translating RVC-CAL applications into Canals are presented. The proposed approaches are applied to an existing MPEG-4 Simple Profile decoder for evaluation purposes. The inverse discrete cosine transform (IDCT) is accelerated by the means of OpenCL

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