The advanced intermediate representation with extensibility/common environment (AIRE/CE)

Willis, John; Peterson, Gregory D.; Gregor, Sallie

doi:10.1109/naecon.1998.710202

Cited by 13 publications

(5 citation statements)

References 3 publications

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“…As the current implementation of TSL-IF is in Cϩϩ, object-oriented techniques have been exploited to optimize TSL-IF's design and implementation. TSL-IF is also useful for performing other transformations and analyses [Willis et al 1996] of the network topology. Generation of configuration information in TSL format can be automated to generate several different regular and irregular internetwork topologies [Zegura et al 1996].…”

Section: The Topological Specification Languagementioning

confidence: 99%

Web-based network analysis and design

Rao

Radhakrishnan

Wilsey

2000

ACM Trans. Model. Comput. Simul.

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The gradual acceptance of high-performance networks as a fundamental component of today's computing environment has allowed applications to evolve from static entities located on specific hosts to dynamic, distributed entities that are resident on one or more hosts. In addition, vital components of software and data used by an application may be distributed across the local/wide area network. Given such a fluid and dynamic environment, the design and analysis of high-performance communication networks (using off-the-shelf components offered by third party manufacturers) has been further complicated by the diversity of the available components. To alleviate these problems and to address the verification and validation issues involved in engineering such complex networks, a web-based framework for the design and analysis of computer networks was developed. Using the framework, a designer can explore design alternatives by constructing and analyzing configurations of the design using components offered by different researchers and manufacturers. The framework provides a flexible and robust environment for selecting and verifying the optimal solution from a large and complex solution space. This paper presents issues involved in the design and development of the framework.

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Section: The Topological Specification Languagementioning

confidence: 99%

Web-based network analysis and design

Rao

Radhakrishnan

Wilsey

2000

ACM Trans. Model. Comput. Simul.

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“…The primary input to the framework is the description of the hardware component in VHDL [9]. The input VHDL is analyzed into an Internal Intermediate Representation (IIR) called the Advanced Intermediate Representation with Extensibility [22] (AIRE) using scram; the VHDL parser and code-generator developed as a part of the SAVANT project. The intermediate form is used to generate C++ code compliant with the TYVIS interface.…”

Section: Experimental Frameworkmentioning

confidence: 99%

Study of a multilevel approach to partitioning for parallel logic simulation

Subramanian

Rao²,

Wilsey³

Proceedings 14th International Parallel and Distributed Processing Symposium. IPDPS 2000

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“…The SAVANT project is an effort by University of Cincinnati's Experimental Computing Laboratory to build an extensible, object-oriented intermediate form (IIR) for the hardware description language VHDL [13]. The project started as a joint effort between MTL Systems and the University, with funding from the Air Force.…”

Section: The Savant Parallel Simulatormentioning

confidence: 99%

Integrating multiple parallel simulation engines for mixed-technology parallel simulation

Martin

Wilsey

Hoekstra³

et al.

Proceedings 35th Annual Simulation Symposium. SS 2002

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The emergence of mixed-signal (analog and digital) integrated circuits motivates the need for CAD tools supporting mixed-signal design and analysis. Furthermore, the presence of a large body of existing models in existing modeling language and the need for modeling mixedsignal (analog and digital) circuits motivates the need for a single unified simulation framework into which different parallel simulation subsystems can be easily connected. In this paper, we have review the design of a light-weight simulation backplane for integrating simulators from different domains. Of particular focus for this paper is the integration of a parallel SPICE (analog circuit) simulator called Xyce Ì Å with a parallel VHDL (digital circuit) simulator called SAVANT.

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The advanced intermediate representation with extensibility/common environment (AIRE/CE)

Cited by 13 publications

References 3 publications

Web-based network analysis and design

Web-based network analysis and design

Study of a multilevel approach to partitioning for parallel logic simulation

Integrating multiple parallel simulation engines for mixed-technology parallel simulation

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