Test volume and application time reduction through scan chain concealment

Bayraktaroglu, I.; Orailoglu, A.

doi:10.1109/dac.2001.935494

Cited by 23 publications

(48 citation statements)

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“…and FDR codes. Test data volume reduction techniques based on on-chip pattern decompression are also presented in [1,2,8,9,11,14]. Although all these techniques aim to reduce test data volume, the different approaches present different design alternatives and their applicability to a particular design varies from case to case.…”

Section: Introductionmentioning

confidence: 99%

On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression

Chakrabarty

2004

J Electron Test

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We examine the use of exponential-Golomb codes and subexponential codes can be used for the compression of scan test data in core-based system-on-a-chip (SOC) designs. These codes are well-known in the data compression domain but their application to SOC testing has not been explored before. We show that these codes often provide slighly higher compression than alternative methods that have been proposed recently.

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Section: Introductionmentioning

confidence: 99%

On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression

Chakrabarty

2004

J Electron Test

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“…Test cost mainly depends on test data volume, test application time, power consumption during test, and so on. It is well known that test compaction algorithms and test compression techniques [1][2][3][4][5][6][7][8] are effective for test cost reduction. Besides, a number of compaction or compression techniques with test power reduction are also published since it is useful for enhancing test reliability and decreasing test cost.…”

Section: Introductionmentioning

confidence: 99%

“…(2) In the word reduction process, don't-care bits in "frequent words" are fixed to binary values so as to minimize scan-in transitions.…”

Section: Introductionmentioning

confidence: 99%

Low Power Oriented Test Modification and Compression Techniques for Scan Based Core Testing

Hayashi

Ikeda

Shinogi

et al. 2006

2006 15th Asian Test Symposium

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This paper proposes effective techniques for reducing not only test data volume but also scan-in transitions that are closely related to power dissipation. First, we adopt a new test smoothing algorithm that can reduce scan-in transitions through test vector modification. Second, we propose a test compression method that can reduce test data volume while keeping down the increase of transitions as small as possible. The effectiveness of the proposed techniques is shown through experiments for ISCAS'89 benchmark circuits.

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“…Depending on the implementation of the decompressing hardware, the schemes for test stimulus compression include code-based schemes [3]- [8], broadcast-based schemes [9]- [15], linear-decompressor based schemes [16]- [25], etc. The lineardecompressor based schemes typically achieve better encoding efficiency than other two types of schemes and they are dominant approach used in industry today.…”

Section: Introductionmentioning

confidence: 99%

On Utilizing Test Cube Properties to Reduce Test Data Volume Further

Lin

Rajski

2012

2012 IEEE 21st Asian Test Symposium

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Test data compression has become a dominant approach to reduce the test cost today. Majority of test compression schemes are based on the fact that the generated test cubes have very few specified bits. This paper studies additional test cube properties and utilizes them to reduce the test data volume (TDV) further. Two approaches are proposed in this paper. The first one requires no additional hardware and the second one is based on the new DFT hardware, named background chains. The proposed approaches can be combined with other test compression schemes to achieve additional TDV reduction. The experimental results based on embedded deterministic test (EDT) show the proposed approaches achieve significant TDV reduction for industrial designs.

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Test volume and application time reduction through scan chain concealment

Cited by 23 publications

References 0 publications

On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression

On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression

Low Power Oriented Test Modification and Compression Techniques for Scan Based Core Testing

On Utilizing Test Cube Properties to Reduce Test Data Volume Further

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