Test generation based diagnosis of device parameters for analog circuits

Chatterjee, S.; Chatterjee, A.

doi:10.1109/date.2001.915084

Cited by 4 publications

(6 citation statements)

References 16 publications

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“…where α ∈ [0, 1] is called a homotopy parameter. At α = 0 equation h (x, 0) = 0 has known or easy to finding solution x (0) , whereas at α = 1 equation 6becomes the original equation (5) possessing the solution x * , which we seek. The main idea of the homotopy is increasing parameter α, starting with α = 0 and every time solving equation (6), taking into account the solution obtained in previous step.…”

Section: Concept Of Homotopymentioning

confidence: 99%

“…, x n and homotopy path is traced in more sophisticated manner. In such a case the range of changing of parameter α is not limited to α = 1, what allows finding multiple solutions of equation (5). This is illustrated in Fig.…”

Section: Concept Of Homotopymentioning

confidence: 99%

“…Only a few papers discuss the global parametric fault diagnosis. To tackle that problem the nonlinear regression modeling techniques [5], the artificial neural network [13], and the differential evolution [14] were used. A new approach to the problem of global fault diagnosis is proposed in reference [31], based on the homotopy concept and the simplicial method [9].…”

Section: Global Fault Diagnosis Of Analog Cmos Circuits Manufacturmentioning

confidence: 99%

“…On the other hand analog testing lags far behind digital testing. Although the problem has been of considerable interest during the past decades [1]- [5], [7]- [8], [10]- [19], [21]- [32], [35]- [38] there is no all-purpose procedure for fault diagnosis of analog circuits. In 2013 the M. Tadeusiewicz, S. Hałgas, and A. Kuczyński are with the Department of Electrical, Electronic, Computer and Control Engineering, Łódź University of Technology, Stefanowskiego 18/22, 90-924 Łódź, Poland, (e-mail: michal.tadeusiewicz@p.lodz.pl).…”

Section: Introductionmentioning

confidence: 99%

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New Aspects of Fault Diagnosis of Nonlinear Analog Circuits

Tadeusiewicz

Hałgas

Kuczyński

2015

International Journal of Electronics and Telecommunications

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The paper is focused on nonlinear analog circuits, with the special attention paid to circuits comprising bipolar and MOS transistors manufactured in micrometer and submicrometer technology. The problem of fault diagnosis of this class of circuits is discussed, including locating faulty elements and evaluating their parameters. The paper deals with multiple parametric fault diagnosis using the simulation after test approach as well as detection and location of single catastrophic faults, using the simulation before test approach. The discussed methods are based on diagnostic test, leading to a system of nonlinear algebraic type equations, which are not given in explicit analytical form. An important and new aspect of the fault diagnosis is finding multiple solutions of the test equation, i.e. several sets of the parameters values that meet the test. Another new problems in this area are global fault diagnosis of technological parameters in CMOS circuits fabricated in submicrometer technology and testing the circuits having multiple DC operating points. To solve these problems several methods have been recently developed, which employ different concepts and mathematical tools of nonlinear analysis. In this paper they are sketched and illustrated. All the discussed methods are based on the homotopy (continuation) idea. It is shown that various versions of homotopy and combinations of the homotopy with some other mathematical algorithms lead to very powerful tools for fault diagnosis of nonlinear analog circuits. To trace the homotopy path which allows finding multiple solutions, the simplicial method, the restart method, the theory of linear complementarity problem and Lemke’s algorithm are employed. For illustration four numerical examples are given

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Section: Concept Of Homotopymentioning

confidence: 99%

Section: Concept Of Homotopymentioning

confidence: 99%

Section: Global Fault Diagnosis Of Analog Cmos Circuits Manufacturmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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New Aspects of Fault Diagnosis of Nonlinear Analog Circuits

Tadeusiewicz

Hałgas

Kuczyński

2015

International Journal of Electronics and Telecommunications

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“…Recall that for analog circuits, the test signals should be continuous in the time domain and in their value range. Analog faults depend on the device parameters [8][9][10][11], but the fault models used in these approaches are defective because of the discrete fault values. Thus, these approaches are most suitable for detecting faults that can be explicitly enumerated and are not suitable for parametric faults.…”

Section: Introductionmentioning

confidence: 99%

Test generation algorithm for analog systems based on support vector machine

Long

Wang

2010

SIViP

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In some methods for test generation, an analog device under test (DUT) is treated as a discrete-time digital system by placing it between a digital-to-analog converter and an analog-to-digital converter. Then the test patterns and responses can be performed and analyzed in the digital domain. We propose a novel test generation algorithm based on a support vector machine (SVM). This method uses test patterns derived from the test generation algorithm as input stimuli, and sampled output responses of the analog DUT for classification and fault detection. The SVM is used for classification of the response space. When the responses of normal circuits are similar to those of faulty circuits (i.e., the latter have only small parametric faults), the response space is mixed and traditional algorithms have difficulty in distinguishing the two groups. However, the SVM provides an effective result. This paper also proposes an algorithm to calculate the test sequence for input stimuli using the SVM results. Numerical experiments prove that this algorithm can enhance the precision of test generation.

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Machine Learning Support for Diagnosis of Analog Circuits

Stratigopoulos

2022

Machine Learning Support for Fault Diagnosis of System-on-Chip

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We discuss the state-of-the-art on fault diagnosis for analog circuits with a focus on techniques that leverage machine learning. For a chip that has failed either in post-manufacturing testing or in the field of operation, fault diagnosis is launched to identify the root-cause of failure at sub-block level and transistor-level. In this context, machine learning can be used to build a smart system that predicts the fault that has occurred from diagnostic measurements extracted on the chip. We discuss the different elements of a diagnosis flow for analog circuits, including fault modeling, fault simulation, diagnostic measurement extraction and selection, and the machine learning algorithms that compose the prediction system. We also demonstrate a machine learning-based diagnosis flow on an industrial case study.

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Test generation based diagnosis of device parameters for analog circuits

Cited by 4 publications

References 16 publications

New Aspects of Fault Diagnosis of Nonlinear Analog Circuits

New Aspects of Fault Diagnosis of Nonlinear Analog Circuits

Test generation algorithm for analog systems based on support vector machine

Machine Learning Support for Diagnosis of Analog Circuits

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