Template-Based Generation of Streaming Accelators from a High Level Presentation

Bellas, Nikolaos; Chai, Sek; Dwyer, Malcolm; Linzmeier, Dan

doi:10.1109/fccm.2006.69

Cited by 7 publications

(1 citation statement)

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“…Their approach does not clearly define kernels and streams of data, so the burden is on the programmer to explicitly define which parts of the application will be implemented in hardware. Bellas et al [2006] developed a system based on streaming accelerators. The computation in an application is expressed as a streaming dataflow graph (sDFG), and data streams are specified through stream descriptors.…”

Section: Related Workmentioning

confidence: 99%

Exploiting Task- and Data-Level Parallelism in Streaming Applications Implemented in FPGAs

Plavec

Vranesic

Brown

2013

ACM Trans. Reconfigurable Technol. Syst.

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This article describes the design and implementation of a novel compilation flow that implements circuits in FPGAs from a streaming programming language. The streaming language supported is called FPGA Brook and is based on the existing Brook language. It allows system designers to express applications in a way that exposes parallelism, which can be exploited through hardware implementation. FPGA Brook supports replication, allowing parts of an application to be implemented as multiple hardware units operating in parallel. Hardware units are interconnected through FIFO buffers which use the small memory modules available in FPGAs. The FPGA Brook automated design flow uses a source-to-source compiler, developed as a part of this work, and combines it with a commercial behavioral synthesis tool to generate the hardware implementation. A suite of benchmark applications was developed in FPGA Brook and implemented using our design flow. Experimental results indicate that performance of many applications scales well with replication. Our benchmark applications also achieve significantly better results than corresponding implementations using a commercial behavioral synthesis tool. We conclude that using an automated design flow for implementation of streaming applications in FPGAs is a promising methodology.

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Section: Related Workmentioning

confidence: 99%