Temperature determination of SiC MPS diodes during surge current event with measurement and simulation

Palanisamy, Shanmuganathan; Yoganath, Gurunath Vishwamitra; Zeng, Guang; Lutz, Josef; Kowalsky, Jens; Basler, Thomas

doi:10.23919/epe.2019.8915381

Cited by 7 publications

(4 citation statements)

References 8 publications

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“…Whereas the maximum chip temperature is the determining factor in the surge current test, the thermal impedance measurement uses the average junction temperature, which is more than 100K lower than the maximum chip temperature in a surge current event, see [4].…”

Section: Measurement Of Thermal Impedancementioning

confidence: 99%

Surge current test of SiC MOSFET with planar Assembling and Joining Technology

Ye,

Hensler,

Basler

et al. 2023

ISPS'23 Proceedings

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Section: Measurement Of Thermal Impedancementioning

confidence: 99%

Surge current test of SiC MOSFET with planar Assembling and Joining Technology

Ye,

Hensler,

Basler

et al. 2023

ISPS'23 Proceedings

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show abstract

“…Moreover, since the junction temperature is a critical variable in the surge process, a good knowledge of it is necessary to investigate device surge capabilities. Unfortunately, the junction temperature is not a directly measurable physical quantity, and usually indirect measurement and simulation should be used [ 10 , 27 , 28 , 29 ]. Considering that the surge current phenomenon is a complicated electro-thermal coupled process, such simulations often tend to be extremely time- consuming.…”

Section: Introductionmentioning

confidence: 99%

A Comparative Study of Silicon Carbide Merged PiN Schottky Diodes with Electrical-Thermal Coupled Considerations

Ren

Guo

et al. 2020

Materials

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A comparative study of surge current reliability of 1200 V/5 A 4H-SiC (silicon carbide) MPS (Merged PiN Schottky) diodes with different technologies is presented. The influences of device designs in terms of electrical and thermal aspects on the forward conduction performance and surge current capability were studied. Device forward characteristics were simulated and measured. Standard single-pulse surge current tests and thermal impedance measurements were carried to show their surge capability and thermal design differences. An advanced thermal RC (thermal resistance-capacitance) model, with the consideration of current distribution non-uniformity effects, is proposed to accurately calculate the device junction temperature during surge events. It was found that a thinner substrate and a hexagonal layout design are beneficial to the improvement of the bipolar conduction performance in high current mode, as well as the surge current capability. The thinner substrate design also has advantages on thermal aspects, as it presents the lowest thermal resistance. The calculated failure temperature during the surge tests is consistent with the aluminum melting phenomenon, which is regarded as the failure mechanism. It was demonstrated that, for a SiC MPS diode, higher bipolar conduction performance is conducive to restraining the joule heat, and a lower thermal resistance design is able to accelerate the heat dissipation and limit the junction temperature during surge events. In this way, the MPS diode using a thinner substrate and advanced layout design technology is able to achieve 60% higher surge current density capability compared to the other technologies.

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“…However, in addition to the thermal resistance, another fundamental parameter that impacts the SiC chip temperature is the thermal capacitance. As a result of wafer thinning practices, the thermal capacitance of the SiC chip is reduced, which has an opposing effect to the thermal resistance in terms of the SiC chip temperature during surge-current events.The capability of Schottky diodes to withstand surge currents has been extensively reported in published literature, as it is regarded as one of the most significant reliability factors of power devices [10][11][12][13][14][15][16][17][18][19] . However, the association between wafer thinning and the surge-current capability of a Schottky diode is a novel field of research, with studies predominately reporting on the beneficial influence of wafer thinning as a way of enhancing the surge-current capability.…”

mentioning

confidence: 99%

“…The capability of Schottky diodes to withstand surge currents has been extensively reported in published literature, as it is regarded as one of the most significant reliability factors of power devices [10][11][12][13][14][15][16][17][18][19] . However, the association between wafer thinning and the surge-current capability of a Schottky diode is a novel field of research, with studies predominately reporting on the beneficial influence of wafer thinning as a way of enhancing the surge-current capability.…”

mentioning

confidence: 99%

The effect of wafer thinning and thermal capacitance on chip temperature of SiC Schottky diodes during surge currents

Damcevska,

Dimitrijev,

Haasmann

et al. 2023

Sci Rep

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Due to superior material properties of SiC for high-voltage devices, SiC Schottky diodes are used in energy-conversion systems such as solar-cell inverters, battery chargers, and power modules for electric cars and unmanned aerial vehicles. The reliable operation of these systems requires the chip temperature of SiC Schottky diodes to be maintained within the limit set by the device package. This is especially crucial during surge-current events that dissipate heat within the device. As a thermal-management method, manufactures of commercial SiC Schottky diodes have introduced wafer thinning practices to reduce the thickness of the SiC chip and, consequently, to reduce its thermal resistance. However, this also leads to a reduction in the thermal capacitance. In this paper, we present experimental data and theoretical analysis to demonstrate that the reduced thermal capacitance has a much larger adverse effect in comparison to the beneficial reduction of the thermal resistance. An implication of the presented results is that, contrary to the adopted wafer thinning practices, SiC Schottky diodes fabricated without wafer thinning have superior surge-current capability.

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Temperature determination of SiC MPS diodes during surge current event with measurement and simulation

Cited by 7 publications

References 8 publications

Surge current test of SiC MOSFET with planar Assembling and Joining Technology

Surge current test of SiC MOSFET with planar Assembling and Joining Technology

A Comparative Study of Silicon Carbide Merged PiN Schottky Diodes with Electrical-Thermal Coupled Considerations

The effect of wafer thinning and thermal capacitance on chip temperature of SiC Schottky diodes during surge currents

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