TAS-MRAM based Non-volatile FPGA logic circuit

Abstract

As one of the most promising Spintronics applications, MRAM combines the advantages of high writing and reading speed, limitless endurance and non-volatility. The integration of MRAM in FPGA allows the logic circuit to rapidly configure the algorithm, the routing and logic functions, easily realize the dynamical reconfiguration and multicontext configuration. However, the conventional MRAM technology based on Field Induced Magnetic Switching (FIMS) writing approach consumes very high power and large circuit surface, and produces high disturbance between memory cells. These drawbacks prevent FIMS-MRAM's further development in memory and logic circuit. Thermally Assisted Switching (TAS) based MRAM is then evaluated to address these issues and some design techniques for FPGA logic circuits based on TAS-MRAM technology are presented. By using STMicroelectronics CMOS 90nm technology, some chip characteristic results have been calculated to demonstrate the expected performance of TAS-MRAM based FPGA logic circuits.

Reconfigurable Circuits Using Magnetic Tunneling Junction Memories

“…MRAM have so far been exclusively employed as elements on fine-grained FPGA look alike solutions, such as Look Up Tables (LUT) [3], [4], [9], [10], [11], [12] and no works have been published on MRAM-based coarse-grained reconfigurable arrays.…”

“…Two circuit designs have been evaluated for the TAS-MRAM based storage cell [10], [11]. These circuits, as shown in Fig.…”

“…The strength and nature of the required magnetic field depends on the writing approach. Currently, there are 3 writing approaches known as Field Induced Magnetic Switching (FIMS) [3], [4], [9], Thermally Assisted Switching (TAS) [10], [11] and Spin Transfer Torque (STT) [12].…”

Design of Look up Table for Emerging Non Volatile Memories in FRAM

“…However, the sneaking paths inherent in crossbar array bring considerable leakage and poor sensing margin of only 10 mV. [7,8] To sum up, none of the previous work has achieved high reliability against memory and logic variations, low power, high-area efficiency, and low leakage at the same time. This brief introduces a low-power variation-tolerant nv LUT circuit to overcome the issues in the previous work.…”

“…Based on the logic-in-memory concept, lookup table, which is the core building block in FPGAs, has been proposed with non volatility. [6,7] First, various nonvolatile SRAM (nvSRAM) structures with MRAM andRRAMwere proposed to directly replace SRAM in the traditional lookup table to acquire non volatility .However, the size of nvSRAM cell is remarkably larger than that of SRAM, and the write disturbance is also difficult to avoid for half-select RRAM cells [4,5]. Suzuki et al also proposed a six-input nvLUT with serial/parallel magnetic junctions to acquire enough sensing margin.…”