Table lookup techniques for fast and flexible digital logic simulation

Abstract

well-known fundamental computer technique consists of the "interpretation" of naturally available or artifically formed data items as addresses to perform table-lookups.Although well-known, this technique is still not exploited to its fullest potential.The power and extent of this technique as applied to logic simulation is demonstrated.

High-speed concurrent fault simulation with vectors and scalars

“…Instead, table-lookup and its extensive role in the VOTE simulator is the subject of a brief companion paper [11].…”

“…Possibly the single most important mechanism for achieving speed, flexibility, and generality is the traverse-table method of traversing linked lists [4,10,11].…”

“…Early versions of this mechanism have been used in the GTE FANSIM simulators, but a fuller exploitation of the potential of this technique has been reached in the present simulator [4,11].…”

“…zoom table element evaluation technique [2,8,11] directly takes advantage of the descriptor data structure.…”

Experimental evaluation of concurrent fault simulation algorithms on scalable, hierarchically defined test cases

“…It is intended to determine the effect of adding an incremental change (bundling) to the HCFS algorithm. Other enhancements which would exist in a robust commercial version, such as fault collapsing [18], zoom tables [20], or careful virtual memory management [91, are not present. …”