2004
DOI: 10.1007/978-3-540-24588-9_51
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Systolic Architecture of Adaptive Post Detection Integration CFAR Processor in Binomial Distribution Pulse Jamming

Abstract: Abstract.A new parallel algorithm for signal processing and a parallel systolic architecture of a CFAR processor with adaptive censoring and post detection integration (API) are presented in the paper. The processor proposed is used for target detection when echoes from targets are performed in conditions of binomial distribution pulse jamming. The property of the algorithm proposed is its ability automatically to determine and censor the unwanted samples corrupted by pulse jamming in both, the two-dimensional… Show more

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Cited by 1 publication
(13 citation statements)
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“…The suggested statistical algorithm for a RACPI CFAR detector is in fact a further development of the results achieved in [4,5]. The proposed new systolic architecture allows its calculating structure to follow closely the statistical algoritm, which leads to increased quality of detection and keeping constant false alarm probability.…”
Section: Introductionmentioning
confidence: 99%
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“…The suggested statistical algorithm for a RACPI CFAR detector is in fact a further development of the results achieved in [4,5]. The proposed new systolic architecture allows its calculating structure to follow closely the statistical algoritm, which leads to increased quality of detection and keeping constant false alarm probability.…”
Section: Introductionmentioning
confidence: 99%
“…Censoring of the randomly arriving interference impulses both, in the test resolution cells and the reference cells, is used. Garvanov proposes in [5] a new modification of the parallel algorithm presented in [4]. This algorithm works successfully in the presence of total interference (thermal noise plus pulse jamming) that is binominal distributed according to the compound exponential law [6], with unknown average repetition frequency and magnitude.…”
Section: Introductionmentioning
confidence: 99%
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