System-on-a-Programmable-Chip Development Platforms in the Classroom

Abstract

Abstract-This paper describes our experiences using a system-on-a-programmable-chip (SOPC) approach to support the development of design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial field-programmable gate array (FPGA)-based SOPC development board with a reduced instruction set computer (RISC) processor core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial FPGA computer-aided design (CAD) tools, a C compiler targeted for the RISC soft processor core, and a large FPGA with memory is used and reused to support a wide variety of student projects.

Teaching hybrid HW/SW embedded system design using FPGA-based devices

“…In fact, the use of SoPC-based learning courses is not new, and some examples can be found throughout the literature. These examples include processor microarchitecture assessment [2], embedded algorithm programming [3], robotics projects [4], real-time system design [5], or custom hardware accelerator designs [6] among others.…”

Constructivist Multi-Access Lab Approach in Teaching FPGA Systems Design with LabVIEW

“…FPGAs have been shown to afford a number of new opportunities for classroom learning, such as: FPGA-based robotics laboratory experiments [21][22][23]. FPGAs have also been successfully used in the classroom to study system on programmable chip (SoPC) design, hardware/software co-design, computer architecture, and signal processing hardware implementations [22][23][24][25]. The flexibility and ease of use of FPGAs provide an opportunity for students to work on more meaningful projects with tens of thousands of gates while still learning the fundamentals of digital design [26,27].…”

FPGA-Realization of a Motion Control IC for X-Y Table

“…Due to the FSM belongs to the sequential processing method; the FPGA resources usage can be greatly reduced. Further, in recent years, an embedded processor IP and an application IP can now be developed and downloaded into FPGA to construct a SoPC environment (Altera, 2004), allowing the users to design a SoPC module by mixing hardware and software in one FPGA chip (Hall & Hamblen, 2004). The circuits required fast processing but fixed computation are suitable to be implemented by hardware in FPGA, and the heavy computation or complicated processing can be realized by software in FPGA (Kung et al, 2004;Kung & Shu, 2005).…”