System Level Integration of Simulation Methods for High Data-Rate Transmission Circuit Design Applications

Abstract

Abstract-A system level integration of simulation methods for high data-rate transmission circuit design applications is developed in this paper. While the elementary circuit theory was responsible for designing the circuits to meet the required performance specifications, three dimensional full-wave electromagnetic simulation technique was adopted to characterize the off-chip parasitic effects induce from the packages. The developed technique was applied for the design of optical Pick-Up Head (PUH) driver circuitry and a data transmission rate up to 640 Mega bits per second (Mb/s) was achieved with standard 0.35 µm CMOS technology, showing the promising feature of applying such technique in successful design for high data-rate transmission circuits.

Design and realization of 1.3 Gb/s off-chip transmission circuitry using 0.35 μm CMOS technology

“…System level integration approach for design of high data-rate transmission circuits was proposed [9] to resolve the bandwidth and complicated coupling issues that can not be handled by the conventional approaches [10,11]. In contrast to the conventional approaches, full-wave electromagnetic(EM) characterizations of the interconnects were performed and the generalized S-parameters obtained with multi-mode excitation were used to generate the equivalent circuit in a wideband sense to accommodate for the high frequency content in the clocked time signal with ultra short rise/fall time.…”

A New Efficient Method for Calculation and Suppression of Simultaneous Switching Noise With the Time-Domain Impedance Function for High-Speed Circuit Design

“…With the trend of the integrated circuit (IC) technology scaled downward to smaller and faster transistors, digital, analog, radio frequency and other function circuits are integrated into one package or printed circuit board (PCB), which results in increasing current [1]. Simultaneous switching noise (SSN) has become one of the major difficulties in the design of high-speed digital circuit systems with even faster edge rates, lower voltage levels and higher integrations.…”

Impedance Matching Capability of Novel Socket Contactor Design Using Variable Open Stubfor Rf Packaging Testing

“…An ever-increasing level of electrical and mechanical performance accuracy has become the most significant factor in socket and contactor technology in order to realize high-speed functioning beyond the GHz of a wafer or a package [1], since highly precise performance testing enables a designer to determine which design scheme may be properly applied. Numerous types of contact solutions have been developed [2][3][4][5].…”