IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06)
DOI: 10.1109/isvlsi.2006.87
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System Exploration of SystemC Designs

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Cited by 12 publications
(8 citation statements)
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References 8 publications
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“…Afterwards, the augmented implementation is analyzed with the parser of [8] to construct a CDFG representation similar to a netlist on RTL [19]. Depending on the chosen instruction, one instruction in IL corresponds to t, 0 < t, nodes in the CDFG.…”
Section: Diagnosis Modelmentioning
confidence: 99%
“…Afterwards, the augmented implementation is analyzed with the parser of [8] to construct a CDFG representation similar to a netlist on RTL [19]. Depending on the chosen instruction, one instruction in IL corresponds to t, 0 < t, nodes in the CDFG.…”
Section: Diagnosis Modelmentioning
confidence: 99%
“…• crossprobing • critical path fragment navigation • module exploration • RTL operator symbols A main difference to the visualization in [1] is the usage of RTL operators, offered by RTLVision. They are used to directly map expressions given by the behavior of the model, instead of mapping black boxes or complex modules that implement the corresponding operators.…”
Section: B Rtlvisionmentioning
confidence: 99%
“…In this work 1 we present a visualization approach for SystemC, based on the analysis tool from [1]. The implementation is made up of two tools that interact with each other.…”
mentioning
confidence: 99%
“…For the transformation of the SystemC DUV into an AST the front-end from [5,8] is used that is part of the design environment SyCE [3]. The parser of the frontend was build with PCCTS (Purdue Compiler Construction Tool Set) [14].…”
Section: Systemc Analysismentioning
confidence: 99%