2021 IEEE International Electron Devices Meeting (IEDM) 2021
DOI: 10.1109/iedm19574.2021.9720530
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System Design Technology Co-Optimization for 3D Integration at <5nm nodes

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“…Indeed, the electrical performances of aggressively scaled transistors are strongly impacted by selfheating, ultrafast thermal transport and thermal conductivity degradation, all of which link to electron-phonon coupling which is not well understood at the nanoscale. The integration of this technology in the mainstream design flow is thus not straightforward and requires design technology cooptimization (DTCO) at an early stage [6][7]. This paper is an important step to achieve this goal.…”
Section: Introductionmentioning
confidence: 99%
“…Indeed, the electrical performances of aggressively scaled transistors are strongly impacted by selfheating, ultrafast thermal transport and thermal conductivity degradation, all of which link to electron-phonon coupling which is not well understood at the nanoscale. The integration of this technology in the mainstream design flow is thus not straightforward and requires design technology cooptimization (DTCO) at an early stage [6][7]. This paper is an important step to achieve this goal.…”
Section: Introductionmentioning
confidence: 99%