Synthesis of multioutput logic networks using spectral techniques

Bennett, Lawrence A.

doi:10.1049/ip-cdt:19952016

Cited by 5 publications

(11 citation statements)

References 0 publications

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“…7 The last illustration serves as an overall illustration of algorithm BASIC-MOTO-X and demonstrates the opportunities of simplification that may arise and which are taken care of in a post-processing step. Assume that we have two outputs (given here in sum-of-minterms form, with the notation (4,5,9,12,13). Assume that minterms m 0 , m 8 of OUT1 and minterms m 4 , m 5 , m 12 , m 13 of OUT2 have already been examined.…”

Section: A Illustrationsmentioning

confidence: 99%

“…(The notation d() indicates don't care minterms.) Function BAR1 ( Table 1 in [3]) with outputs: (3,4,5,6,7).…”

Section: Other Functionsmentioning

confidence: 99%

“…Function BAR2 ( Table 2 in [3]) with outputs: Z 1 (a, b, c, d) = m (1,6,7,9,11,14,15), Z 2 (a, b, c, d) = m (4,5,6,7,10,12,13,14,15), (1,4,5,9,10,11,12,13,14,15).…”

Section: Other Functionsmentioning

confidence: 99%

“…Function AGR2 ( Table 2 in [1]) with outputs: Z 1 (a, b, c, d) = m (2,6,7,10,14,15), Z 2 (a, b, c, d) = m (4,5,7,8,9,11,12,15). Table 3 in [1], first used in [20]) with outputs: Z 1 (a, b, c, d) = m (1,2,3,4,6,7,8,9,10,11,12,13,15), Z 2 (a, b, c, d) = m (3,4,6,7,9,10,11,12,14,15).…”

Section: Other Functionsmentioning

confidence: 99%

“…This need increases the interest for transistorlevel (or "switch-level") CAD tools for digital VLSI design. Traditional approaches and tools work at the gate level and produce optimized Boolean expressions with respect to constraints such as area, delay and power that are then mapped to platforms such as Programmable Logic Devices (i.e., PLAs, PALs, FPGAs) or standard cells (see, e.g., [18], [10], [3], [20], [9], [17], [1], [6], [19], [4], [8], [5], [25], [28], [23], [24]). The design effort is thus greatly reduced but the area and performance are compromised when compared to what can be achieved by a customized transistor-level approach.…”

Section: Introductionmentioning

confidence: 99%

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MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool

Kagaris

2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Transistor count minimization is an important goal as VLSI technology approaches its technical and physical limits. In this work, we present a CAD synthesis tool that tries to minimize the number of transistors required to implement a given multiple-output logic function. The proposed transistor-level synthesis approach goes beyond the traditional series-parallel design style and allows for extensive bridging. It starts from a sum-ofproducts expression for each output, allowing also for don't care terms, and produces a transistor network with a small number of transistors to implement all outputs jointly under a userspecified bound on the number of transistors in series to avoid long charge/discharge paths. Experimental results on previously examined multi-output functions and case studies (Full Adder, Gray/Binary Counter, Seven-Segment Display) demonstrate the benefit of the approach.

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Section: A Illustrationsmentioning

confidence: 99%

“…(The notation d() indicates don't care minterms.) Function BAR1 ( Table 1 in [3]) with outputs: (3,4,5,6,7).…”

Section: Other Functionsmentioning

confidence: 99%

“…Function BAR2 ( Table 2 in [3]) with outputs: Z 1 (a, b, c, d) = m (1,6,7,9,11,14,15), Z 2 (a, b, c, d) = m (4,5,6,7,10,12,13,14,15), (1,4,5,9,10,11,12,13,14,15).…”

Section: Other Functionsmentioning

confidence: 99%

Section: Other Functionsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool

Kagaris

2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Logic Functions

2007

Spectral Logic and Its Applications for the Design of Digital Devices

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Logical manipulations and design of tributary networks in the arithmetic spectral domain

Chang

Falkowski

1998

IEE Proc., Comput. Digit. Tech.

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Synthesis of multioutput logic networks using spectral techniques

Cited by 5 publications

References 0 publications

MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool

MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool

Logic Functions

Logical manipulations and design of tributary networks in the arithmetic spectral domain

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