MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool

Abstract

Transistor count minimization is an important goal as VLSI technology approaches its technical and physical limits. In this work, we present a CAD synthesis tool that tries to minimize the number of transistors required to implement a given multiple-output logic function. The proposed transistor-level synthesis approach goes beyond the traditional series-parallel design style and allows for extensive bridging. It starts from a sum-ofproducts expression for each output, allowing also for don't care terms, and produces a transistor network with a small number of transistors to implement all outputs jointly under a userspecified bound on the number of transistors in series to avoid long charge/discharge paths. Experimental results on previously examined multi-output functions and case studies (Full Adder, Gray/Binary Counter, Seven-Segment Display) demonstrate the benefit of the approach.