2012
DOI: 10.5120/5568-7656
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Synthesis Comparison of Karatsuba Multiplierusing Polynomial Multiplication, Vedic Multiplier and Classical Multiplier

Abstract: In this paper, the authors have compared the efficiency of the Karatsuba multiplier using polynomial multiplication with the multiplier implementing Vedic mathematics formulae (sutras), specifically the Nikhilam sutra. The multipliers have been implemented using Spartan 2 xc2s200 pq208 FPGA device having speed grade of-6. The proposed Karatsuba multiplier has been found to have better efficiency than the multipliers involving Vedic mathematics formulae.

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Cited by 6 publications
(8 citation statements)
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“…Future works can explore the combination of Vedic sutras with the Karatsuba multiplier, for instance, to enrich results. Some hybrid strategies making use of that emerge in [27][28][29]. The performances of such hybrid multipliers can benefit from lessening the (i) spent power, (ii) total amount of gates, (iii) garbage outputs, (iv) constant inputs, (v) quantum cost, (vi) total reversible logic implementation cost Since Vedic math can speed up calculations and most metaheuristics rely heavily on multiplications and additions, the current design can augment the performance of existing deployments of FPGA-based signal processing noticeably [30][31][32][33][34][35].…”
Section: Discussionmentioning
confidence: 99%
“…Future works can explore the combination of Vedic sutras with the Karatsuba multiplier, for instance, to enrich results. Some hybrid strategies making use of that emerge in [27][28][29]. The performances of such hybrid multipliers can benefit from lessening the (i) spent power, (ii) total amount of gates, (iii) garbage outputs, (iv) constant inputs, (v) quantum cost, (vi) total reversible logic implementation cost Since Vedic math can speed up calculations and most metaheuristics rely heavily on multiplications and additions, the current design can augment the performance of existing deployments of FPGA-based signal processing noticeably [30][31][32][33][34][35].…”
Section: Discussionmentioning
confidence: 99%
“…Besides, Karatsuba algorithm can be implemented as recursive and iterative (Mishra and Pradhan, 2012). The multiplication of two 2-digit decimal numbers is calculated as shown in Fig.…”
Section: Methodsmentioning
confidence: 99%
“…Moreover, multiplication is an arithmetic operation usually used in hardware level in digital filtering (Madke and Zafar, 2014). In addition, the efficiency of multiplication operation is a base for implementation of modulators, cryptosystems, ALU (Arithmetic Logic Unit) and many other devices like these (Mishra and Pradhan, 2012).…”
Section: Introductionmentioning
confidence: 99%
“…In order to implement modulators, cryptosystems, ALU (Arithmetic Logic Unit) and many other systems, the efficiency of multiplication operation is a basis (Mishra and Pradhan, 2012).…”
Section: Introductionmentioning
confidence: 99%