Symbolic timing analysis of asynchronous systems

Hulgaard, Henrik; Amon, Tod Tracy

doi:10.1109/43.875262

Cited by 5 publications

(3 citation statements)

References 26 publications

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“…applicable only to a limited class of circuits -those that exhibit no choice, and are completely deterministic systems. While some attempts to deal with deterministic chocie have been made [14,6], analyzing systems with non-deterministic behavior is undecidable. In fact, in the presence of choice, Xie et.…”

Section: Related Workmentioning

confidence: 99%

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Global critical path

Venkataramani

Budiu

Chelcea

et al. 2007

Proceedings of the 44th Annual Conference on Design Automation - DAC '07

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An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is defined at the RTL level, as the longest path in the combinational logic between clocked registers. In this paper, we present a system-level timing analysis technique to define the concept of a Global Critical Path (GCP), for predicting system-level performance. We show how the GCP can be used as a theoretical and practical tool for understanding, summarizing and optimizing the behavior of highly concurrent self-timed circuits. We formally define the GCP and show how it can be constructed using a discrete event model and hardware profiling techniques. The GCP provides valuable insight into the control-path behavior of circuits and in finding system-level bottlenecks. We have incorporated the GCP construction and analysis framework into a high-level synthesis and simulation toolchain, thus enabling complete automation in modeling, analysis and optimization.

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Section: Related Workmentioning

confidence: 99%

“…In the past, two approaches have been proposed for dealing with choice -worstcase analysis [6] and stochastic analysis [14]. However, both these approaches deal only with unique choice and not non-determinism.…”

Section: Dynamic Gcp Constructionmentioning

confidence: 99%

Global critical path

Venkataramani

Budiu

Chelcea

et al. 2007

Proceedings of the 44th Annual Conference on Design Automation - DAC '07

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show abstract

“…Nielsen and Kishinevsky [30] only compute performance. Holgaard and Amon [31] do so as well but enable parametric analysis by adding symbolic element delays. Kim and Beerel [32] go a step further and consider where to insert delays in such pipelines-an operation similar to retiming.…”

Section: Pipeline Performance Analysismentioning

confidence: 99%

Synthesis and Optimization of Pipelined Packet Processors

Soviani

Hadzic²,

Edwards

2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-We consider pipelined architectures of packet processors consisting of a sequence of simple packet-processing modules interconnected by first-in first-out buffers. We propose a new model for describing their function, an automated synthesis technique that generates efficient hardware for them, and an algorithm for computing minimum buffer sizes that allow such pipelines to achieve their maximum throughput. Our functional model provides a level of abstraction familiar to a network protocol designer; in particular, it does not require knowledge of register-transfer-level hardware design. Our synthesis tool implements the specified function in a sequential circuit that processes packet data a word at a time. Finally, our analysis technique computes the maximum throughput possible from the modules and then determines the smallest buffers that can achieve it. Experimental results conducted on industrial-strength examples suggest that our techniques are practical. Our synthesis algorithm can generate circuits that achieve 40 Gb/s on field-programmable gate arrays, equal to state-of-the-art manual implementations, and our buffer-sizing algorithm has a practically short runtime. Together, our techniques make it easier to quickly develop and deploy high-speed network switches.

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Time separations of cyclic event rule systems with min–max timing constraints

Zhao

Mao

2008

Theoretical Computer Science

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Symbolic timing analysis of asynchronous systems

Cited by 5 publications

References 26 publications

Global critical path

Global critical path

Synthesis and Optimization of Pipelined Packet Processors

Time separations of cyclic event rule systems with min–max timing constraints

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