Symbolic Analysis of Analog Circuits By Boolean Logic Operations

Abstract

In this brief, the author proposes a novel symbolic analysis method for analog behavioral modeling by Boolean logic operations and graph representation. The exact symbolic analysis problem is formulated as a logic circuit synthesis problem where we build a logic circuit that detects whether or not a given symbolic term is a valid product term from a determinant. The logic circuit is represented by binary decision diagrams (BDDs), which can be trivially transformed into zero-suppressed BDDs (ZBDDs). ZBDDs are essentially determinant decision diagram (DDD) representation of a determinant. The proposed BBD-based method gives the circuit logic interpretation of symbolic terms in a determinant and exploits such logic interpretation during the BDD/DDD construction process. It demonstrates an inherent relationship between symbolic circuit analysis and logic synthesis. It is the first symbolic analysis method that is not based on traditional Laplace expansion or topological methods. Experimental results show the speedup of our new method over the existing flat method and its improved analysis capacity over both existing flat and hierarchical symbolic analyzers.Index Terms-Behavioral modeling, binary decision diagrams (BDDs), determinant decision diagrams (DDDs), simulation, symbolic analysis.

Symbolic noise analysis of low voltage amplifiers by using nullors

“…The output noise can be expressed by (6). Comparing (4) with HSPICE simulations, we obtain the graph of Fig.…”

“…10. This circuit equivalent generates an admittance matrix of order 5×5, which can be easily solved by applying [6]. The output noise can be expressed by (7).…”

“…6, 8 and 11, we can conclude on the suitability of applying our proposed symbolic noise analysis approach for low voltage amplifiers. The main advantage is the application of only nodal analysis, while the formulation generates reduced equations which can be solved by [6]. …”

“…However, that symbolic approach can be enhanced by reducing the order of the system of equations when considering only dominant circuitelements, as already shown in [2], [4], [5]. Further-more, for small matrices (up to order 12), the symbolic expression can be generated by applying Boolean logic operations [6], instead of using determinant decision diagrams [2]. In this manner, the goal of this paper is to show the application of symbolic nodal analysis (NA) [4]- [5], to generate simplified behavioral models of analog ICs using nullors [7].…”

Symbolic analysis of analog circuits containing voltage mirrors and current mirrors

“…The solution of the formulation can be obtained by boolean logic operations [32], or by determinant decision diagrams [23,40]. Elsewhere, we can formulate a much reduced system of equations in a nullor network, because it also allows us to apply circuit reduction methods [6,16,21,24].…”