Surface chemistry and Fermi level movement during the self-cleaning of GaAs by trimethyl-aluminum

Tallarida, Massimo; Adelmann, Christoph; Delabie, Annelies; Elshocht, Sven Van; Caymax, Matty; Schmeißer, Dieter

doi:10.1063/1.3615784

Cited by 41 publications

(58 citation statements)

References 24 publications

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“…Similar results were also found on In x Ga 1-x As (0<x<1) (100) surfaces [28,29]. Also Tallarida et al [30] reported the reduction of Gaand As-oxides by ALD of Al 2 O 3 (TMA/H 2 O). Ga 3+ states were completely removed.…”

Section: Passivation Of the Iii/v Gate Stack: Going Beyond Interface supporting

confidence: 81%

Passivation Challenges with Ge and III/V Devices

Sioncke¹,

Lin²,

Nyns³

et al. 2012

ECS Trans.

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Ge and III/V materials are investigated as high mobility channel materials for devices beyond the 14 nm technology node. Passivation of the interface is a prerequisite as dangling bond states trap charges and reduce the mobility. Passivation of the Ge/high-κ interface can be done by using GeO 2 as a passivation layer. However, large thicknesses are needed to keep a low defect density. Introduction of S at the interface can solve this issue. Passivation of III/V materials is still a major problem. Oxidation of the III-As surface leads to stress at the surface creating As-As bonds. Oxides can be partially removed by wet treatment or during the ALD deposition. The defects related to As-As bonds cannot be removed by the ALD process. We demonstrate that also for InP, an oxide free interface does not solve the passivation problem.

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Section: Passivation Of the Iii/v Gate Stack: Going Beyond Interface supporting

confidence: 81%

Passivation Challenges with Ge and III/V Devices

Sioncke¹,

Lin²,

Nyns³

et al. 2012

ECS Trans.

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“…While there are reports of arsenic oxides "bubbling" through an ALD HfO 2 overlayer, no such observations have been made for gallium oxides. 9 As a result we have to assume that such diffusion processes occur through 2−4 nm thick Ta 50 have demonstrated that the first two TMA pulses reduce the vast majority of the As 3+ surface species into As suboxides that are subsequently removed from the interface. Contrary, for the Ga 3+ oxides, they observe a slower and almost linear reduction of the species intensity for the first six pulses.…”

Section: ■ Discussionmentioning

confidence: 99%

Interface Between Atomic Layer Deposition Ta₂O₅ Films and GaAs(100) Surfaces

Gougousi

2012

J. Phys. Chem. C

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Ta 2 O 5 films were deposited on GaAs(100) surfaces using thermal atomic layer deposition from pentakis dimethyl amino tantalum (PDMAT) and H 2 O. The interface between the films and native oxide covered GaAs surfaces has been examined using X-ray photoelectron spectroscopy as a function of film thickness and for deposition temperatures ranging from 200 to 350°C. Gradual removal of the surface arsenic and gallium oxides was observed, with the removal of the arsenic oxides in general more efficient. The high oxidation states of both the arsenic and the gallium oxides were also found easier to remove. Elevation of the process temperature above 300°C resulted in significant enhancement of the native oxide removal rate. When films were deposited on GaAs surfaces that had the surface oxides removed, a practically sharp interface between the film and the GaAs substrate was maintained.

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“…TMA), known as the "clean-up" or "self-cleaning" effect. (3)(4)(13)(14)(15)(16)(17) In this mechanism, the metal precursor interacts with the native oxide by binding with oxygen, which is used to form the desired deposited oxide. For instance, Milojevic et al used in-situ XPS to investigate the reduction of native oxide of In 0.2 Ga 0.8 As during the ALD of Al 2 O 3 and showed that, upon the first TMA exposure, Al 2 O 3 was formed through the reduction of the As-and Gabased oxides, particularly the 3 + oxidation state.…”

Section: Interfacial Layer Evolution During Ald Of Al 2 O 3 On Inpmentioning

confidence: 99%

Chemical Nature and Control of High-k Dielectric/III-V Interfaces

Cabrera

Chabal

2015

ECS Trans.

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A number of surface treatments and deposition techniques have been developed to control the interface of high-k/III-V semiconductor gate stacks, which is critical to III-V-based device performance. While electrical measurements have demonstrated the value of these specific processes, there has been little work on the chemical composition of III-V surfaces and interfaces. Using primarily infrared absorption spectroscopy, we have focused on two aspects associated with oxide growth processing: 1) chemical passivation of the interface with monolayer engineering, and 2) barrier for III-V elemental diffusion. We find for example that incorporation of silicon layer by gas phase processing prior to atomic layer deposition of Al 2 O 3 on an oxidized InP surface is effective in reducing an interface layer, composed of dative P=O•••Al and covalent P-O-Al bonds. However, such barriers are not as effective in preventing indium diffusion through high-k dielectrics either during ALD growth or upon post-annealing.

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Surface chemistry and Fermi level movement during the self-cleaning of GaAs by trimethyl-aluminum

Cited by 41 publications

References 24 publications

Passivation Challenges with Ge and III/V Devices

Passivation Challenges with Ge and III/V Devices

Interface Between Atomic Layer Deposition Ta₂O₅ Films and GaAs(100) Surfaces

Chemical Nature and Control of High-k Dielectric/III-V Interfaces

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Surface chemistry and Fermi level movement during the self-cleaning of GaAs by trimethyl-aluminum

Cited by 41 publications

References 24 publications

Passivation Challenges with Ge and III/V Devices

Passivation Challenges with Ge and III/V Devices

Interface Between Atomic Layer Deposition Ta2O5 Films and GaAs(100) Surfaces

Chemical Nature and Control of High-k Dielectric/III-V Interfaces

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Product

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Interface Between Atomic Layer Deposition Ta₂O₅ Films and GaAs(100) Surfaces