Suppression of Reverse Leakage in Enhancement‐Mode GaN High‐Electron‐Mobility Transistor by Extended PGaN Technology

Dai, Xinyue; Ji, Zhongchen; Jiang, Qimeng; Huang, Sen; Fan, Jie; Feng, Chao; Jin, Hao; Tang, Xiao‐Tian; Wang, Xinhua; Liu, Xinyu

doi:10.1002/pssa.202200692

Cited by 3 publications

(2 citation statements)

References 31 publications

(34 reference statements)

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“…Besides, p-GaN diodebased OTP devices are fully compatible with commercial p-GaN processes and can achieve high integration at low cost. Furthermore, the unique properties of p-GaN diodes, including their inherent stability, high thermal conductivity, and resistance to harsh environmental conditions, make them an intriguing candidate for OTP memory technology [13] .…”

Section: Introductionmentioning

confidence: 99%

A novel one-time-programmable memory unit based on Schottky-type p-GaN diode

Feng,

Dai,

Jiang

et al. 2024

J. Semicond.

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In this work, a novel one-time-programmable memory unit based on a Schottky-type p-GaN diode is proposed. During the programming process, the junction switches from a high-resistance state to a low-resistance state through Schottky junction breakdown, and the state is permanently preserved. The memory unit features a current ratio of more than 103, a read voltage window of 6 V, a programming time of less than 10−4 s, a stability of more than 108 read cycles, and a lifetime of far more than 10 years. Besides, the fabrication of the device is fully compatible with commercial Si-based GaN process platforms, which is of great significance for the realization of low-cost read-only memory in all-GaN integration.

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Section: Introductionmentioning

confidence: 99%

A novel one-time-programmable memory unit based on Schottky-type p-GaN diode

Feng,

Dai,

Jiang

et al. 2024

J. Semicond.

Self Cite

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“…To tackle this dilemma, re-configure the P-HEMTs from the perspective of the p-GaN geometry designs can offer opportunities to tailor the electric field (E F ) distribution along device channels and thereby enhance device characteristics. Recently, the p-GaN caps with thin p-GaN extensions from gate edges towards drain ends were demonstrated [18,19], showing improved V BD and device reliability. However, in those demonstrations, some of the p-GaN geometries would lead to degraded on-state device performance.…”

Section: Introductionmentioning

confidence: 99%

Enhanced performance of normally-OFF GaN HEMTs with stair-shaped p-GaN cap layer

Ye,

Zhang,

Xing

et al. 2024

J. Phys. D: Appl. Phys.

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The p-GaN gated E-mode HEMTs (P-HEMTs) are being extensively studied for emerging power electronics. However, the devices still suffer from performance trade-off among threshold voltage (VTH), output drain current (IDS), and breakdown voltage (VBD). Herein, we propose P-HEMTs with a stair-like p-GaN cap layer to boost their performance. The p-GaN cap layer is composed of four discrete p-GaN staircases with the decreased thickness to the right (Right-Stair P-HEMT, RSP-HEMT) or to the left (Left-Stair P-HEMT, LSP-HEMT). It is found that the RSP-HEMT simultaneously achieves the 1.3-times increased IDS, 160 V enhanced VBD, and improved VTH stability against drain-induced barrier lowering (DIBL) effects, compared with the LSP-HEMT and the conventional BaSeline P-HEMT (BSP-HEMT). These device merits should be attributed to the effective manipulation of the lateral electric field (EF) under all bias conditions by the unique band structures enabled by the RSP configuration. Such EF manipulation strategies to improve device characteristics offer us helpful guidance and insights to further propel the development of high-performance E-mode P-HEMTs of the future.

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