Suppression of Degradation Induced by Negative Gate Bias and Illumination Stress in Amorphous InGaZnO Thin-Film Transistors by Applying Negative Drain Bias

Wang, Dapeng; Hung, Mai Phi; Jiang, Jingxin; Toda, Tatsuya; Furuta, Mamoru

doi:10.1021/am500300g

Cited by 26 publications

(23 citation statements)

References 32 publications

(33 reference statements)

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“…[5][6][7][8][9] The origin of the near-VBM state has been actively investigated from both experimental and theoretical standpoints. Kamiya et al reported the oxygen vacancy with void in oxygen deficient IGZO film is an origin of the near-VBM state.…”

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confidence: 99%

Suppression of Negative Gate Bias and Illumination Stress Degradation by Fluorine-Passivated In-Ga-Zn-O Thin-Film Transistors

Furuta

Jiang

Hung

et al. 2016

ECS J. Solid State Sci. Technol.

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The negative gate bias and illumination stress (NBIS) stability and photo-response of In-Ga-Zn-O (IGZO) thin-film transistors (TFTs) with either silicon oxide (SiO X ) or fluorinated silicon nitride (SiN X :F) passivation were investigated. NBIS degradation can be suppressed when the fluorine (F) in SiNx:F diffused into an IGZO channel during long annealing period. Photo-response analysis revealed that F passivated effectively electron traps in the IGZO channel existing at an energy level close to the valence band maximum (near-VBM state). The fluorine-passivated IGZO TFT is thus advantageous for achieving highly reliable IGZO TFT for next-generation displays. An amorphous In-Ga-Zn-O (a-IGZO) semiconductor is widely accepted as a promising channel material for TFT applications owing to its outstanding electrical properties.3 However, it is recognized that degradation under negative gate bias and illumination stress (NBIS) is a unique but serious issue for oxide TFTs.4 When a negative gate voltage and illumination stresses are simultaneously applied to oxide TFTs, the enhancements of negative threshold voltage (V th ) shift and hysteresis were observed due to photo-excitation of electrons from high-density electron traps existing in an IGZO at an energy level close to the valence band maximum (near-VBM state). [5][6][7][8][9] The origin of the near-VBM state has been actively investigated from both experimental and theoretical standpoints. Kamiya et al. reported the oxygen vacancy with void in oxygen deficient IGZO film is an origin of the near-VBM state.10 In addition, weakly-bonded oxygen, interstitial oxygen, undercoodinated oxygen, and peroxide have been reported as origins of the near-VBM state in an IGZO film.11-14 Moreover, the -OH groups in the film have also been reported to relate the density of the near-VBM state. [15][16][17] Although the origin of the near-VBM state is still debatable, passivation or reduction of the near-VBM state originating from oxygen-related defects is essential to improve NBIS reliability. Wet-O 2 annealing has been reported to improve the NBIS reliability of the IGZO TFT. 17,18 It has also been reported that formation of OH-bonds in an IGZO is an important factor to passivate the near-VBM state.17 A theoretical study also indicated that a hydrogen atom preferentially binds to undercoordinated oxygen, resulting in a passivation of the near-VBM state.14 Although many researches have made numerous efforts to improve the NBIS reliability of oxide TFTs, NBIS degradation has as yet not been suppressed.We reported that reliability of the IGZO TFT under positive gate bias and temperature stress (PBTS) was drastically improved by a fluorine-passivated IGZO TFT. 19 It was found that fluorine (F) effectively passivated electron traps and weakly bonded oxygen in an IGZO channel and at a gate insulator (GI)/channel interface when F diffused into an IGZO channel. However, both the F passivation effect of the near-VBM state and its influence on the NBIS stability of the IGZO TFT have not bee...

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confidence: 99%

Suppression of Negative Gate Bias and Illumination Stress Degradation by Fluorine-Passivated In-Ga-Zn-O Thin-Film Transistors

Furuta

Jiang

Hung

et al. 2016

ECS J. Solid State Sci. Technol.

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“…Consequently, the abnormal hump observed in the forward measurement disappears in the reverse measurement, suggesting that the donor-like defect states, located near the Fermi level ( E F ) at V GS of the turn-on voltage, are generated and stabilized in the IGZO layer. It is noted that the trapped electrons at the back-channel interface are hardly de-trapped even when the positive V GS is applied [17]. As a result, the transfer curves in the reverse measurement exhibit a parallel shift of 10.03 V without SS degradation in the positive V GS direction after the NBIS duration of 10 4 s.…”

Section: Resultsmentioning

confidence: 99%

“…The NBIS-induced hysteresis increases remarkably from 11.94 V for the TFT with T IGZO = 25 nm to 13.47 V for the TFT with T IGZO = 45 nm, and decreases drastically to 9.54 and 9.93 V when the T IGZO further increases to 75 and 100 nm. For further quantitative analysis of the origin of the NBIS-induced hysteresis, a positive gate pulse mode is carried out just after the NBIS duration of 10 4 s. Based on our previous publication [17], the optimized condition of a positive gate pulse with pulse width of 1 ms and pulse height of 10 V is enough to neutralize the ionized V O + /V O 2+ -induced donor-like defect states while it has no influence on the trapped holes at the front-channel interface, as shown in Fig. 3–l.…”

Section: Resultsmentioning

confidence: 99%

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Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

Wang¹,

Furuta²

2018

Beilstein J. Nanotechnol.

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The photoleakage current and the negative bias and illumination stress (NBIS)-induced instability in amorphous InGaZnO thin-film transistors (a-IGZO TFTs) with various active layer thicknesses (T IGZO) were investigated. The photoleakage current was found to gradually increase in a-IGZO TFTs irrespective of the T IGZO when the photon energy of visible light irradiation exceeded ≈2.7 eV. Furthermore, the influence of the T IGZO on NBIS-induced instability in a-IGZO TFTs was explored by the combination of current–voltage measurements in double-sweeping V GS mode and capacitance–voltage measurements. The NBIS-induced hysteresis was quantitatively analyzed using a positive gate pulse mode. When the T IGZO was close to the Debye length, the trapped electrons at the etch-stopper/IGZO interface, the trapped holes at the IGZO/gate insulator interface, and the generation of donor-like states in an a-IGZO layer were especially prominent during NBIS.

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“…19 However, we have reported previously that generated defects under NBIS were stabilized by captured electrons 8 and were drifted by lateral electric field. 30 Chowdhury et al have reported that double-donor was created in the IGZO channel during NBIS. 31 Those results strongly suggest that the creation of ionized oxygen vacancies (V O + , V O 2+ ) is one of the reasons for TFT degradation under NBIS.…”

Section: Resultsmentioning

confidence: 99%

Quantitative Analysis of Hole-Trapping and Defect-Creation in InGaZnO Thin-Film Transistor under Negative-Bias and Illumination-Stress

Hung

Wang

Toda

et al. 2014

ECS J. Solid State Sci. Technol.

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We report two measurement methods, named positive gate pulse mode (PGPM) and double sweeping mode (DSM), which can estimate the hysteresis induced by hole trapping in a gate insulator ( V hole ) and by defect creation in the IGZO channel ( V defect ). The effects of IGZO deposition temperature and of stress temperature on defect creation in the channel under negative bias and illumination stress (NBIS) are investigated. The results show that high deposition temperature of IGZO reduces defect creation in the channel under NBIS. The average activation energy for hole trapping in a GI under NBIS has been calculated to be 0.39 eV. InGaZnO (IGZO) thin-film transistors (TFTs) with field effect mobility >10 cm 2 /(V · s) are now used in high definition, large area ether active matrix liquid crystal displays (AMLCD) and active matrix organic light emitting diode displays (AMOLED).1,2 However, the reliability of IGZO TFTs under negative bias and illumination stress (NBIS) still requires improvement. Three possible reasons for NBIS instability in IGZO TFTs have been reported: (i) hole trapping in a gate insulator (GI), 3,4 (ii) donor like defect creation in the IGZO channel, [5][6][7] and (iii) electron trapping at a back channel interface. 8 Many efforts to improve NBIS reliability of IGZO TFT have been reported. 9-14 Hole trapping at front channel interface could be reduced by using AlO x as a gate insulator 9 or by using TiO 2 as a hole blocking layer. 14 The donor like state creation could be reduced by annealing IGZO TFTs in a high pressure water vapor, 10 wet O 2 , 11 hydrogen environment. 12 An AlO x , SrO x passivation layer could be used to suppress deep subgap defects in the IGZO channel. 13 In our previous study, 8 both hole trapping in a GI and donor like state creation in an IGZO channel induced hysteresis (V h ) in an IGZO TFT under NBIS. However, unlike a-Si TFT, the NBIS degradation mechanism in IGZO TFT is not consistent. It depends on the TFT structure, 15 the IGZO composition 16 and the fabrication process.17 Therefore, an understanding of the contribution of hole trapping in a GI and donor like state creation in an IGZO channel to V h is essential in the work to improve oxide TFT stability.Capacitance-voltage measurement is usually used to detect defect creation in the IGZO channel. 18,19 Subthreshold voltage swing [Ss = dV g /d log I D (V/decade)] could also be used to estimate the total number of generated defects ( N defect ) using the equation:[1]The threshold voltage shift induced by generated defects ( V defect ) can be calculated using the following equation:where C i is gate capacitance per unit area, q is the elementary charge, K is the Boltzmann constant and T is the absolute temperature (K). However, to the best of our knowledge, there is no direct method for separately measuring of hysteresis induced by trapped hole in a gate insulator ( V hole ) and hysteresis induced by defect creation in a channel ( V defect ). In this study, we demonstrate our developed measurement method, referred to i...

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Suppression of Degradation Induced by Negative Gate Bias and Illumination Stress in Amorphous InGaZnO Thin-Film Transistors by Applying Negative Drain Bias

Cited by 26 publications

References 32 publications

Suppression of Negative Gate Bias and Illumination Stress Degradation by Fluorine-Passivated In-Ga-Zn-O Thin-Film Transistors

Suppression of Negative Gate Bias and Illumination Stress Degradation by Fluorine-Passivated In-Ga-Zn-O Thin-Film Transistors

Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

Quantitative Analysis of Hole-Trapping and Defect-Creation in InGaZnO Thin-Film Transistor under Negative-Bias and Illumination-Stress

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