Summarizer

Abstract

Modern data center solid state drives (SSDs) integrate multiple general-purpose embedded cores to manage ash translation layer, garbage collection, wear-leveling, and etc., to improve the performance and the reliability of SSDs. As the performance of these cores steadily improves there are opportunities to repurpose these cores to perform application driven computations on stored data, with the aim of reducing the communication between the host processor and the SSD. Reducing host-SSD bandwidth demand cuts down the I/O time which is a bottleneck for many applications operating on large data sets. However, the embedded core performance is still signicantly lower than the host processor, as generally wimpy embedded cores are used within SSD for cost eective reasons. So there is a trade-o between the computation overhead associated with near SSD processing and the reduction in communication overhead to the host system. In this work, we design a set of application programming interfaces (APIs) that can be used by the host application to ooad a data intensive task to the SSD processor. We describe how these APIs can be implemented by simple modications to the existing Non-Volatile Memory Express (NVMe) command interface between the host and the SSD processor. We then quantify the computation versus communication tradeos for near storage computing using applications from two important domains, namely data analytics and data integration. Using a fully functional SSD evaluation platform we perform design space exploration of our proposed approach by varying the bandwidth and computation capabilities of the SSD processor. We evaluate static and dynamic approaches for dividing the work between the host and SSD processor, and ⇤ Gunjae and Kiran contributed equally to the paper.

GenStore: a high-performance in-storage processing system for genome sequence analysis

“…Second, it reduces the overall performance and energy burden of the application from the rest of the system, freeing them up to do other useful work meanwhile. Third, as shown by many prior works (e.g., [88][89][90][91]), ISP can benefit from the SSD's larger internal bandwidth. For example, with 8 ( 16) channels for SSD-C (SSD-P) and the maximum per-channel bandwidth of 1.2 GB/s, the maximum internal bandwidth is calculated to be 9.6 GB/s (19.2 GB/s).…”

“…In-Storage Processing. Several works propose ISP designs as accelerators for different applications [88, (e.g., in machine learning [147,150,151], pattern processing and read mapping [91,149], and graph analytics [141]), generalpurpose [145,146,[152][153][154][155][156][157][158][159][160][161][162][163], bulk-bitwise operations using flash memory [164,165], in close integration with FPGAs [90,[166][167][168][169][170], or GPUs [171]. None of these works perform metagenomic analysis nor address the challenges of ISP for metagenomics.…”

blockNDP

“…Works that show the general applicability of NDP exist, prominent examples include INSIDER [30], Biscuit [19], Summarizer [22], iSSD [13], and Willow [32]. These works demonstrated that it is possible to reap the benefits of NDP in SSDs by leveraging tailor-made, user-space programming framework.…”

“…Although near data processing (NDP) in-storage devices has been proposed in the context of hard disks drives (HDDs) [7] and databases [20] a long time ago, it become technologically and economically feasible only recently with the introduction of solid state drives (SSDs) [11,16,17,19,22,28,30,32,37]. SSDs store data on NAND flash memory media, which have no mechanical parts compared to traditional rotational HDDs.…”

Reconfigurable nonvolatile Boolean logic with one-transistor-two-memristor for in-memory computing

“…The advent of the information era has led to the explosive growth of data, and thus poses a tremendous challenge to the conventional computing paradigm based on von Neumann architecture [1][2][3][4][5]. The continual data shuttling between the memory and CPU dramatically hinder the improvement of speed and energy efficiency which is referred to as the von Neumann bottleneck [6][7][8][9].…”