Substrate-bias effect and source-drain breakdown characteristics in body-tied short-channel SOI MOSFET's

Maeda, S.; Hirano, Y.; Yamaguchi, Yutaro; Iwamatsu, T.; Ippóshi, T.; Ueda, K.; Mashiko, Kunihiro; Maegawa, Satoru; Abe, Haruhiko; Nishimura, Tadashi

doi:10.1109/16.737454

Cited by 22 publications

(11 citation statements)

References 19 publications

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“…In body-contacted devices, the body potential also has an influence on the back gate surface potential f S2 . It has been shown in [5] that an applied voltage on the body contact can have an influence of several hundreds of millivolts on the back gate surface potential. From eq.…”

Section: B Influence On Surface Potentialsmentioning

confidence: 99%

“…Solving these issues will allow analog circuit design for a wide temperate range up to 400 C. The DC and RF behavior of SOI transistors at high temperatures has been studied intensively [1][2][3][4]. Body biasing has been found useful in influencing the threshold voltage and the breakdown characteristics of SOI-MOSFET devices and is also well known for reducing the off-state leakage current in digital circuits [5]. However, in this paper, we demonstrate that reverse body biasing (RBB) is also an elementary design technique facing analog circuit design issues at high temperatures.…”

Section: Introductionmentioning

confidence: 99%

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Enhanced High Temperature Performance of PD-SOI MOSFETs in Analog Circuits Using Reverse Body Biasing

Schmidt¹,

Kappert²,

Kokozinski³

2013

Journal of Microelectronics and Electronic Packaging

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AbstractÀAnalog circuits realized in a PD-SOI (partiallydepleted silicon-on-insulator) CMOS technology for a wide temperature range up to 4008C are significantly affected by the transistor characteristics at high temperatures. As leakage currents increase with temperature, the analog device performance, for example, intrinsic gain and bandwidth, tend to decrease. Both effects influence the precision of analog circuits and lead to malfunction of the circuitry at high temperatures. Enhancement of the MOSFET device performance and improved design techniques are required to handle these issues. In this paper, we demonstrate that RBB (reverse body biasing) is a useful method to improve the analog performance of PD-SOI transistors and also to push the limit of analog circuit design in SOI technology beyond 3008C. It allows beneficial FD (fully depleted) device characteristics in a 1.0 mm PD-SOI CMOS technology by manipulating the depletion condition of the silicon film. Due to reduced leakage currents, operation in the moderate inversion region of the SOI transistor device up to 4008C is feasible. The method is verified by experimental results of transistors with an H-shaped gate (HGATE), an analog switch, current mirrors, a two-stage operational amplifier, and a bandgap voltage reference. The normalized leakage current of HGATE devices at high temperatures can be reduced by more than one order of magnitude. Thereby, the g m /I d factor is improved significantly especially in the moderate inversion region, which has been inaccessible due to leakage currents. As a result, the intrinsic gain of HGATE transistors is improved. As the method has also been applied to essential analog circuits, it has been found that RBB significantly reduces the errors related to leakage currents and enables the operation of analog circuits in PD-SOI technology up to 4008C.

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Section: B Influence On Surface Potentialsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Enhanced High Temperature Performance of PD-SOI MOSFETs in Analog Circuits Using Reverse Body Biasing

Schmidt¹,

Kappert²,

Kokozinski³

2013

Journal of Microelectronics and Electronic Packaging

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“…The Early voltage V A can be extracted from the output characteristics of the transistor using the calculation in (6).…”

Section: B Early Voltage V Amentioning

confidence: 99%

“…The DC and RF behavior of SOI transistors has been studied up to 300°C [1][2][3][4][5]. Body biasing has been found useful in influencing the threshold voltage and the breakdown characteristics of SOI CMOS devices [6]. In this paper we demonstrate that reverse body biasing (RBB) is an elementary design technique facing analog circuit design issues at high temperatures.…”

Section: Introductionmentioning

confidence: 98%

Analog performance of PD-SOI MOSFETs at high temperatures using reverse body bias

Schmidt

Kappert

Kokozinski

2013

Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

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The analog performance, i.e. intrinsic gain and bandwidth, of SOI (Silicon-on-Insulator) MOSFETs in a wide temperature range up to 400°C has so far been strongly affected by device leakage currents. Thereby the moderate inversion region as a preferred point of operation has been unusable as leakage currents dominate drain currents at high temperatures. In this paper we present a reverse body biasing (RBB) approach to improve the transistor's analog performance up to 400°C. Thereby operation in the lower moderate inversion region of the SOI transistor device is feasible. The method allows beneficial FD (fully depleted) device characteristics in a 1.0 µm PD (partially depleted) SOI CMOS process. NHGATE and PHGATE devices with an H-shaped gate have been investigated. Results report a significant improvement of the gm/Id factor and the intrinsic gain Ai in the moderate inversion region by applying RBB

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“…The DC and RF behavior of SOI transistors at high temperatures has been studied intensively [1][2][3][4][5]. Body biasing has been found useful in influencing the threshold voltage and the breakdown characteristics of SOI CMOS devices and is also well known for reducing the off-state leakage current in digital circuits [6][7]. However, in this paper we demonstrate that reverse body biasing (RBB) is also an elementary design technique facing analog circuit design issues at high temperatures.…”

Section: Introductionmentioning

confidence: 98%

High temperature analog circuit design in PD-SOI CMOS technology using reverse body biasing

Schmidt

Kappert

Kokozinski

2013

2013 Proceedings of the ESSCIRC (ESSCIRC)

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The analog performance, e.g. intrinsic gain and bandwidth, of SOI (Silicon-on-Insulator) MOSFETs is strongly affected by increasing operating temperature. Increased leakage currents and decreased device performance significantly reduce the high temperature capability of analog circuits at high temperatures. In this paper, we demonstrate that the reverse body biasing (RBB) approach improves the transistor's analog performance up to 400°C. With RBB, operation in the lower moderate inversion region of the SOI transistor is feasible at increased temperatures. The method also allows beneficial FD (fully depleted) device characteristics in a 1.0 µm PD (partially depleted) SOI CMOS process. NHGATE and PHGATE devices with an H-shaped gate have been investigated. Results report an improvement of the gm/Id factor and the intrinsic gain Ai in the moderate inversion region by applying RBB. In addition, essential analog building blocks, e.g. current mirrors, an analog switch and a two-stage operational amplifier have been investigated. It is shown that the high temperature operation of these circuits is significantly enhanced when RBB is applied

show abstract

Substrate-bias effect and source-drain breakdown characteristics in body-tied short-channel SOI MOSFET's

Cited by 22 publications

References 19 publications

Enhanced High Temperature Performance of PD-SOI MOSFETs in Analog Circuits Using Reverse Body Biasing

Enhanced High Temperature Performance of PD-SOI MOSFETs in Analog Circuits Using Reverse Body Biasing

Analog performance of PD-SOI MOSFETs at high temperatures using reverse body bias

High temperature analog circuit design in PD-SOI CMOS technology using reverse body biasing

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