Study on carrier trapping and emission processes in InAs/GaAs self-assembled quantum dots by varying filling pulse width during DLTS measurements

Impact of nanostructures and radiation environment on defect levels in III–V solar cells

“…The QD-EL2 defect has a relatively large capture cross-section (suggesting a complex defect similar to EL2), is near the mid- gap, and has a relatively high defect density. This EL2-like defect has been previously seen by other groups in samples containing InAs QDs [13,18,19]. Asano et al has shown that this defect may be due in part to the low temperature GaAs capping layer, used to stabilize the InAs surface before a temperature ramp, rather than the QD itself [19].…”

“…This accumulation peak is a common feature of QD diodes measured in this way [12,13]. The presence of this peak in the CV indicates that the QD region can indeed be filled and depleted using voltage biasing, thus allowing for further DLTS measurements of the QD region.…”

Investigation of electrically active defects in InGaAs quantum wire intermediate-band solar cells using deep-level transient spectroscopy technique

“…They explained the plateaux formation in the forward bias voltage by the QD excited states being filled by electrons or a DEG formed in InGaAs WL. It is, however, worthwhile mentioning that Kim et al [29] observed a hump shape at a forward voltage near 0.4 V in InAs/GaAs QD Schottky diodes grown by MBE; they related this hump to the carrier accumulation in the QD layer.…”

“…They explained the plateaux formation in the forward bias voltage by the QD excited states being filled by electrons or a DEG formed in InGaAs WL. It is, however, worthwhile mentioning that Kim et al[29] observed a hump shape at a forward voltage near 0.4 V in InAs/GaAs QD Schottky diodes grown by MBE; they related this hump to the carrier accumulation in the QD layer.In order to investigate further the behaviour of C-V characteristics, C-V measurements were performed at low frequencies for both doped and undoped QWR devices. The apparent carrier concentration profile as function of depth is also calculated by using the following relations[30]:…”

Deep Level Assessment of n-Type Si/SiO2 Metal-Oxide-Semiconductor Capacitors with Embedded Ge Quantum Dots

“…Successful operation requires that the charge does not leak away by the assistance of traps or defects in the material stack or by thermally-assisted tunneling to the substrate. 6,7 In fact, QDs embedded in a semiconductor or oxide matrix behave in many aspects like giant traps, so that their defect levels can be studied by capacitance-voltage (C-V) measurements at different frequency (f) and temperature (T), [8][9][10][11][12] also called admittance spectroscopy 13,14 and by capacitance transient-based techniques, [15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32] like Deep-Level Transient Spectroscopy (DLTS). 14,33 This enables the assessment of hole and electron emission from the levels associated with QDs, revealing their energy position and capture cross section for thermally stimulated carrier processes.…”